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The 0 0 l fiber texture of high quality coal-tar pitch-based carbon fiber

Carbon (New York), 2006-12, Vol.44 (15), p.3364-3367

2006

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A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI

IEICE transactions on electronics, 2016, Vol.E99.C (6), p.632-640

2016

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A 0.0058mm2 7.0 ENOB 24MS/s 17fJ/conv. threshold configuring SAR ADC with source voltage shifting and interpolation technique

2013 Symposium on VLSI Circuits, 2013, p.C266-C267

2013

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A 0.011 mm2 PVT-robust fully-synthesizable CDR with a data rate of 10.05 Gb/s in 28nm FD SOI

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.285-288

2014

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A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.181-184

2014

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0.025-inch vs 0.035-inch guide wires for wire-guided cannulation during endoscopic retrograde cholangiopancreatography: A randomized study

World journal of gastroenterology : WJG, 2015-08, Vol.21 (30), p.9182-9188

2015

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A 0.026mm2 capacitance-to-digital converter for biotelemetry applications using a charge redistribution technique

2007 IEEE Asian Solid-State Circuits Conference, 2007, p.244-247

2007

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A 0.027-mm2 Self-Calibrating Successive Approximation ADC Core in 0.18-.MU.m CMOS

IEICE transactions on fundamentals of electronics, communications and computer sciences, 2009, Vol.E92-A (2), p.360-366

2009

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A 0.05×0.05mm2 RFID Chip with Easily Scaled-Down ID-Memory

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 2007, p.482-483

2007

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A 0.05 cc Power Amplifier Module with a Novel Low Impedance Matching Technique for 900 MHz Personal Digital Cellular Phone

2001 31st European Microwave Conference, 2001, p.1-4

2001

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A 0.114-mW dual-conduction class-C CMOS VCO with 0.2-V power supply

2009 Symposium on VLSI Circuits, 2009, p.228-229

2009

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A 0.13-μm, 0.78-μm2 low-power four-transistor SRAM cell with a vertically stacked poly-silicon MOS and a dual-word-voltage scheme

2003

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0.13 µm Pattern Delineation Using KrF Excimer Laser Light

Japanese Journal of Applied Physics, 1994, Vol.33 (12S), p.6816

1994

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A 0.13um CMOS ultra-compact DVD SoC employing a full digital equalizing PRML read channel

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571), 2004, p.283-286

2004

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0.18-μm CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation

IEEE journal of solid-state circuits, 2001-06, Vol.36 (6), p.988-996

2001

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0.1μm complementary metal–oxide–semiconductors and beyond

Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 1996, Vol.14 (6), p.4020-4023

Toriumi, Akira

1996

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0.25 μm gate length CMOS devices for cryogenic operation

IEEE transactions on electron devices, 1994-07, Vol.41 (7), p.1179-1183

1994

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A 0.35-0.8V 8b 0.5-35MS/s 2bit/step extremely-low power SAR ADC

2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 2013, p.111-112

2013

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0.35V, 4.1μW, 39MHz crystal oscillator in 40nm CMOS

Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design, 2012, p.333-338

2012

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A 0.38 mm2, 10mhz-6.6 GHz quadrature frequency synthesizer using fractional-N injection-locked technique

2012 IEEE Asian Solid State Circuits Conference (A-SSCC), 2012, p.353-356

2012

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A 0.5-T pure-in-plane-field magnetizing holder for in-situ Lorentz microscopy

Ultramicroscopy, 2019-02, Vol.197, p.105-111

2019

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A 0.5-to-1 V 9-bit 15-to-90 MS/s digitally interpolated pipelined-SAR ADC using dynamic amplifier

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.85-88

2014

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A 0.5-V, 0.05-to-3.2 GHz, 4.1-to-6.4 GHz LC-VCO using E-TSPC frequency divider with forward body bias for sub-picosecond-jitter clock generation

2010 IEEE Asian Solid-State Circuits Conference, 2010, p.1-4

2010

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A 0.5-V, 0.05-to-3.2GHz LC-Based Clock Generator for Substituting Ring Oscillators under Low-Voltage Condition

IEICE transactions on electronics, 2012-01, Vol.E95.C (7), p.1285-1296

2012

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A 0.5 V 1.1 MS/sec 6.3 fJ/Conversion-Step SAR-ADC With Tri-Level Comparator in 40 nm CMOS

IEEE journal of solid-state circuits, 2012-04, Vol.47 (4), p.1022-1030

2012

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The 0 0 l fiber texture of high quality coal-tar pitch-based carbon fiber

A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI

A 0.0058mm2 7.0 ENOB 24MS/s 17fJ/conv. threshold configuring SAR ADC with source voltage shifting and interpolation technique

A 0.011 mm2 PVT-robust fully-synthesizable CDR with a data rate of 10.05 Gb/s in 28nm FD SOI

A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs

0.025-inch vs 0.035-inch guide wires for wire-guided cannulation during endoscopic retrograde cholangiopancreatography: A randomized study

A 0.026mm2 capacitance-to-digital converter for biotelemetry applications using a charge redistribution technique

A 0.027-mm2 Self-Calibrating Successive Approximation ADC Core in 0.18-.MU.m CMOS

A 0.05×0.05mm2 RFID Chip with Easily Scaled-Down ID-Memory

A 0.05 cc Power Amplifier Module with a Novel Low Impedance Matching Technique for 900 MHz Personal Digital Cellular Phone

A 0.114-mW dual-conduction class-C CMOS VCO with 0.2-V power supply

A 0.13-μm, 0.78-μm2 low-power four-transistor SRAM cell with a vertically stacked poly-silicon MOS and a dual-word-voltage scheme

0.13 µm Pattern Delineation Using KrF Excimer Laser Light

A 0.13um CMOS ultra-compact DVD SoC employing a full digital equalizing PRML read channel

0.18-μm CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation

0.1μm complementary metal–oxide–semiconductors and beyond

0.25 μm gate length CMOS devices for cryogenic operation

A 0.35-0.8V 8b 0.5-35MS/s 2bit/step extremely-low power SAR ADC

0.35V, 4.1μW, 39MHz crystal oscillator in 40nm CMOS

A 0.38 mm2, 10mhz-6.6 GHz quadrature frequency synthesizer using fractional-N injection-locked technique

A 0.5-T pure-in-plane-field magnetizing holder for in-situ Lorentz microscopy

A 0.5-to-1 V 9-bit 15-to-90 MS/s digitally interpolated pipelined-SAR ADC using dynamic amplifier

A 0.5-V, 0.05-to-3.2 GHz, 4.1-to-6.4 GHz LC-VCO using E-TSPC frequency divider with forward body bias for sub-picosecond-jitter clock generation

A 0.5-V, 0.05-to-3.2GHz LC-Based Clock Generator for Substituting Ring Oscillators under Low-Voltage Condition

A 0.5 V 1.1 MS/sec 6.3 fJ/Conversion-Step SAR-ADC With Tri-Level Comparator in 40 nm CMOS

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