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A 14-nm Ultra-Low Jitter Fractional-N PLL Using a DTC Range Reduction Technique and a Reconfigurable Dual-Core VCO

IEEE journal of solid-state circuits, 2021-12, Vol.56 (12), p.3756-3767

2021

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A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS

IEEE journal of solid-state circuits, 2019-12, Vol.54 (12), p.3541-3552

2019

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The modified SAVE score: predicting survival using urgent veno-arterial extracorporeal membrane oxygenation within 24 hours of arrival at the emergency department

Critical care (London, England), 2016-10, Vol.20 (1), p.336-336, Article 336

2016

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A 2.8-3.2-GHz Fractional- N Digital PLL With ADC-Assisted TDC and Inductively Coupled Fine-Tuning DCO

IEEE journal of solid-state circuits, 2013-03, Vol.48 (3), p.698-710

2013

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A 14-nm 0.14-psrms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration

IEEE journal of solid-state circuits, 2017-12, Vol.52 (12), p.3446-3457

2017

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Physics of Discrete Impurities under the Framework of Device Simulations for Nanostructure Devices

Materials, 2018-12, Vol.11 (12), p.2559

2018

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Inaccuracy of lung adenocarcinoma subtyping using preoperative biopsy specimens

The Journal of thoracic and cardiovascular surgery, 2017-07, Vol.154 (1), p.332-339.e1

2017

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A 28-nm 75-fs rms Analog Fractional-$N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction

IEEE journal of solid-state circuits, 2019-05, Vol.54 (5), p.1254-1265

2019

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A Programmable 25-MHz to 6-GHz [Formula Omitted] Frequency Multiplier With Digital [Formula Omitted] Compensation

IEEE transactions on circuits and systems. I, Regular papers, 2009-05, Vol.56 (5), p.865

2009

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Giant Pneumatocele with Lung Herniation

Internal Medicine, 2013, Vol.52(20), pp.2377-2378

2013

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Monte Carlo simulation of random dopant fluctuation in C-V characteristics using image charge model and adequately determined length scale

Japanese Journal of Applied Physics, 2019-09, Vol.58 (9), p.91004

2019

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Rituximab-induced pneumonitis mimicking miliary tuberculosis

European respiratory review, 2013-12, Vol.22 (130), p.587-588

2013

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A 15.6-GHz Quad-Core VCO with Extended Circular Coil Topology for Both Main and Tail Inductors in 8-nm FinFET Process

2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2023, p.201-204

2023

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Physics of Discrete Impurities under the Frameworkof Device Simulations for Nanostructure Devices

Materials, 2018-12, Vol.11 (12)

2018

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A 14-nm Low-Cost IF Transceiver IC with Low-Jitter LO and Flexible Calibration Architecture for 5G FR2 Mobile Applications

2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2023, p.277-280

2023

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Asthma Is Associated With a Subsequent Risk of Peripheral Artery Disease: A Longitudinal Population-Based Study

Medicine (Baltimore), 2016-01, Vol.95 (3), p.e2546-e2546

2016

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21.6 A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOS

2019 IEEE International Solid- State Circuits Conference - (ISSCC), 2019, p.354-356

2019

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A 16-Channel, 28/39GHz Dual-Polarized 5G FR2 Phased-Array Transceiver IC with a Quad-Stream IF Transceiver Supporting Non-Contiguous Carrier Aggregation up to 1.6GHz BW

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.1-3

2022

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32.2 A 14nm Analog Sampling Fractional-N PLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 80fs Integrated Jitter and 93fs at Near-Integer Channels

2021 IEEE International Solid- State Circuits Conference (ISSCC), 2021, Vol.64, p.444-446

2021

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A 1.04 - 4V, Digital-Intensive Dual-Mode BLE 5.0/IEEE 802.15.4 Transceiver SoC with extended range in 28nm CMOS

2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2019, p.271-274

2019

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Frequency synthesis with arbitrary input clock rate and rational K/L multiplier ratio

2009 IEEE International Symposium on Circuits and Systems (ISCAS), 2009, p.1365-1368

2009

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A 5.5-7.3 GHz Analog Fractional-N Sampling PLL in 28-nm CMOS with 75 fsrmsJitter and −249.7 dB FoM

2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2018, p.6403-6408

2018

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Numerical Study of Very Small Floating Islands

IEEE transactions on electron devices, 2014-04, Vol.61 (4), p.1145-1152

2014

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A programmable 25 MHz to 6 GHz rational-K/L frequency synthesizer with digital Kvco compensation

2008 IEEE International Symposium on Circuits and Systems, 2008, p.2629-2632

2008

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Innovative Vacuum Cleaner Design Using TRIZ Method

Advanced materials research, 2013, Vol.690-693, p.3372-3376

2013

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A 14-nm Ultra-Low Jitter Fractional-N PLL Using a DTC Range Reduction Technique and a Reconfigurable Dual-Core VCO

A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS

The modified SAVE score: predicting survival using urgent veno-arterial extracorporeal membrane oxygenation within 24 hours of arrival at the emergency department

A 2.8-3.2-GHz Fractional- N Digital PLL With ADC-Assisted TDC and Inductively Coupled Fine-Tuning DCO

A 14-nm 0.14-psrms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration

Physics of Discrete Impurities under the Framework of Device Simulations for Nanostructure Devices

Inaccuracy of lung adenocarcinoma subtyping using preoperative biopsy specimens

A 28-nm 75-fs rms Analog Fractional-$N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction

A Programmable 25-MHz to 6-GHz [Formula Omitted] Frequency Multiplier With Digital [Formula Omitted] Compensation

Giant Pneumatocele with Lung Herniation

Monte Carlo simulation of random dopant fluctuation in C-V characteristics using image charge model and adequately determined length scale

Rituximab-induced pneumonitis mimicking miliary tuberculosis

A 15.6-GHz Quad-Core VCO with Extended Circular Coil Topology for Both Main and Tail Inductors in 8-nm FinFET Process

Physics of Discrete Impurities under the Frameworkof Device Simulations for Nanostructure Devices

A 14-nm Low-Cost IF Transceiver IC with Low-Jitter LO and Flexible Calibration Architecture for 5G FR2 Mobile Applications

Asthma Is Associated With a Subsequent Risk of Peripheral Artery Disease: A Longitudinal Population-Based Study

21.6 A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOS

A 16-Channel, 28/39GHz Dual-Polarized 5G FR2 Phased-Array Transceiver IC with a Quad-Stream IF Transceiver Supporting Non-Contiguous Carrier Aggregation up to 1.6GHz BW

32.2 A 14nm Analog Sampling Fractional-N PLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 80fs Integrated Jitter and 93fs at Near-Integer Channels

A 1.04 - 4V, Digital-Intensive Dual-Mode BLE 5.0/IEEE 802.15.4 Transceiver SoC with extended range in 28nm CMOS

Frequency synthesis with arbitrary input clock rate and rational K/L multiplier ratio

A 5.5-7.3 GHz Analog Fractional-N Sampling PLL in 28-nm CMOS with 75 fsrmsJitter and −249.7 dB FoM

Numerical Study of Very Small Floating Islands

A programmable 25 MHz to 6 GHz rational-K/L frequency synthesizer with digital Kvco compensation

Innovative Vacuum Cleaner Design Using TRIZ Method

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