UB Paderborn / Katalog / Suche / in CDI

A Multiphase DLL With a Novel Fast-Locking Fine-Code Time-to-Digital Converter

IEEE transactions on very large scale integration (VLSI) systems, 2015-11, Vol.23 (11), p.2680-2684

2015

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A Computationally Efficient Reconfigurable FIR Filter Architecture Based on Coefficient Occurrence Probability

IEEE transactions on computer-aided design of integrated circuits and systems, 2016-08, Vol.35 (8), p.1297-1308

2016

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A Sub-1 V Temperature-Insensitive-PSR Bandgap Reference with Complementary Loop Locking

Journal of circuits, systems, and computers, 2019-03, Vol.28 (3), p.1950047

2019

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Analysis and design of a 3rd order velocity-controlled closed-loop for MEMS vibratory gyroscopes

Sensors (Basel, Switzerland), 2013-09, Vol.13 (9), p.12564-12580

2013

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Exploring Efficient Acceleration Architecture for Winograd-Transformed Transposed Convolution of GANs on FPGAs

Electronics (Basel), 2020-02, Vol.9 (2), p.286

2020

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Analysis of parasitic feed-through capacitance effect in closed-loop drive circuit design for capacitive micro-gyroscope

Microsystem technologies : sensors, actuators, systems integration, 2016-09, Vol.22 (9), p.2201-2207

2016

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A Range-Extended and Area-Efficient Time-to-Digital Converter Utilizing Ring-Tapped Delay Line

IEICE transactions on electronics, 2013-01, Vol.E96.C (9), p.1184-1194

2013

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A 3D IC Self-test and Recovery Method Based on Through Silicon Via Defect Modeling: A 3D IC Self-test and Recovery Method Based on Through Silicon Via Defect Modeling

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2012-09, Vol.34 (9), p.2247-2253

2012

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A Mixed Method of Leakage Optimization for Gate-level Netlist

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2014-08, Vol.36 (8), p.2010-2015

2014

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Design of Dynamic Adaptive LDPC Decoder Based on FPGA

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2015-08, Vol.37 (8), p.1937-1943

2015

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An overview to FPGA device design technologies

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2010-03, Vol.32 (3), p.714-727

2010

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An All-Thin-Film Electrochromic Device Composed of MoO3—LiBSO—NiOx, Multilayer Structure

Chinese physics letters, 2008-02, Vol.25, p.740

2008

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Mapper for AIC-based FPGAs

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2015-07, Vol.37 (7), p.1769-1773

2015

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Interconnect Architecture of a Novel And-inverter Cone Based FPGA Cluster

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2015-12, Vol.37 (12), p.3030-3040

2015

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A Statistical Static Timing Analysis Incorporating Process Variations with Spatial Correlations

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2015-02, Vol.37 (2), p.468-476

2015

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Coarse-grained Reconfigurable Array Based on Self-routing Interconnection Network

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2014-09, Vol.36 (9), p.2251-2257

2014

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Circuit Characteristics-driven Semi-supervised Modelling Approach for Accelerating FPGA Design Space Exploration

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2015-10, Vol.37 (10), p.2521-2528

2015

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Direct model extraction of RFCMOS spiral transformers

International journal of electronics, 2010-11, Vol.97 (11), p.1339-1350

2010

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Leakage Current Optimization for FPGA Switch Matrixes Based on Routing Architecture: Leakage Current Optimization for FPGA Switch Matrixes Based on Routing Architecture

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2013-11, Vol.35 (11), p.2784-2789

2013

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A low noise micro-gyroscope interface circuit on chip with demodulation signal phase calibration technique

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2013-10, Vol.35 (10), p.2524-2531

2013

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"Time borrowing" technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer

2008 IEEE International Symposium on Circuits and Systems, 2008, p.1004-1007

2008

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A closed-loop switched-capacitor interface for high-quality microaccelerometer

2010 IEEE Sensors, 2010, p.249-252

2010

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Stability Analysis of Switched-capacitor Closed-loop Micro-accelerometers: Stability Analysis of Switched-capacitor Closed-loop Micro-accelerometers

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2012-09, Vol.34 (9), p.2254-2258

2012

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Optimal Design for FPGA Interconnect Based on Combinations of Single-driver and Multi-driver Wires: Optimal Design for FPGA Interconnect Based on Combinations of Single-driver and Multi-driver Wires

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2010-08, Vol.32 (8), p.2023-2027

2010

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Reducing Undetected Error Rate of CRC Coding Based on Lossless Compression and Implement in Circuits: Reducing Undetected Error Rate of CRC Coding Based on Lossless Compression and Implement in Circuits

Dian zi yu xin xi xue bao = Journal of electronics & information technology, 2010-03, Vol.32 (3), p.705-709

2010

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A Multiphase DLL With a Novel Fast-Locking Fine-Code Time-to-Digital Converter

A Computationally Efficient Reconfigurable FIR Filter Architecture Based on Coefficient Occurrence Probability

A Sub-1 V Temperature-Insensitive-PSR Bandgap Reference with Complementary Loop Locking

Analysis and design of a 3rd order velocity-controlled closed-loop for MEMS vibratory gyroscopes

Exploring Efficient Acceleration Architecture for Winograd-Transformed Transposed Convolution of GANs on FPGAs

Analysis of parasitic feed-through capacitance effect in closed-loop drive circuit design for capacitive micro-gyroscope

A Range-Extended and Area-Efficient Time-to-Digital Converter Utilizing Ring-Tapped Delay Line

A 3D IC Self-test and Recovery Method Based on Through Silicon Via Defect Modeling: A 3D IC Self-test and Recovery Method Based on Through Silicon Via Defect Modeling

A Mixed Method of Leakage Optimization for Gate-level Netlist

Design of Dynamic Adaptive LDPC Decoder Based on FPGA

An overview to FPGA device design technologies

An All-Thin-Film Electrochromic Device Composed of MoO3—LiBSO—NiOx, Multilayer Structure

Mapper for AIC-based FPGAs

Interconnect Architecture of a Novel And-inverter Cone Based FPGA Cluster

A Statistical Static Timing Analysis Incorporating Process Variations with Spatial Correlations

Coarse-grained Reconfigurable Array Based on Self-routing Interconnection Network

Circuit Characteristics-driven Semi-supervised Modelling Approach for Accelerating FPGA Design Space Exploration

Direct model extraction of RFCMOS spiral transformers

Leakage Current Optimization for FPGA Switch Matrixes Based on Routing Architecture: Leakage Current Optimization for FPGA Switch Matrixes Based on Routing Architecture

A low noise micro-gyroscope interface circuit on chip with demodulation signal phase calibration technique

"Time borrowing" technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer

A closed-loop switched-capacitor interface for high-quality microaccelerometer

Stability Analysis of Switched-capacitor Closed-loop Micro-accelerometers: Stability Analysis of Switched-capacitor Closed-loop Micro-accelerometers

Optimal Design for FPGA Interconnect Based on Combinations of Single-driver and Multi-driver Wires: Optimal Design for FPGA Interconnect Based on Combinations of Single-driver and Multi-driver Wires

Reducing Undetected Error Rate of CRC Coding Based on Lossless Compression and Implement in Circuits: Reducing Undetected Error Rate of CRC Coding Based on Lossless Compression and Implement in Circuits

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