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A 0.15-μs/V Buck-Boost Symbol-Power-Tracking Supply Modulator With Dual Auxiliary Current Paths and EPP Scheme for 5G NR Power Amplifiers

IEEE transactions on circuits and systems. I, Regular papers, 2023-11, Vol.70 (11), p.4660-4670

2023

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0.25 mu m gate length N-InGaP/InGaAs/GaAs HEMT DCFL circuit with lower power dissipation than high-speed Si CMOS circuits

1992 International Technical Digest on Electron Devices Meeting, 1992, p.323-326

1992

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La 0.3 Sr 0.7 Ti 0.3 Fe 0.7 O 3-δ -Based Electrodes for Symmetrical Solid Oxide Fuel Cells by A-Site Deficiency Manipulation

ACS applied energy materials, 2023-01, Vol.6 (2), p.841-855

2023

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0.65 V device design with high-performance and high-density 100 nm CMOS technology for low operation power application

2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303), 2002, p.122-123

2002

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0226 Development of CO_2 concentration measurement using photoelectric probing

The Proceedings of the Fluids engineering conference, 2009, Vol.2009, p.141-142

2009

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0590 Reliability of Simple Sleep Evaluation Device at Split-Night Polysomnography

Sleep (New York, N.Y.), 2020-05, Vol.43 (Supplement_1), p.A226-A226

2020

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094 IMPACT OF CORONARY ARTERY BYPASS SURGERY ON LONG-TERM OUTCOMES IN PATIENTS WITH HEART FAILURE: FROM THE CREDO-KYOTO PERCUTANEOUS CORONARY INTERVENTION/CORONARY ARTERY BYPASS GRAFT REGISTRY COHORT-2

Interactive cardiovascular and thoracic surgery, 2013-10, Vol.17 (suppl 2), p.S92-S92

2013

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094IMPACT OF CORONARY ARTERY BYPASS SURGERY ON LONG-TERM OUTCOMES IN PATIENTS WITH HEART FAILURE: FROM THE CREDO-KYOTO PERCUTANEOUS CORONARY INTERVENTION/CORONARY ARTERY BYPASS GRAFT REGISTRY COHORT-2

Interactive cardiovascular and thoracic surgery, 2013-10, Vol.17 (suppl_2), p.S92-S92

2013

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A 1.5 V-supply 200 MHz pipelined multiplier using multiple-valued current-mode MOS differential logic circuits

Proceedings ISSCC '95 - International Solid-State Circuits Conference, 1995, p.314-315

1995

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A 1.5nsec/2.1nsec random read/write cycle 1Mb STT-RAM using 6T2MTJ cell with background write for nonvolatile e-memories

2013 Symposium on VLSI Circuits, 2013, p.C110-C111

2013

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A 1.5nsec/2.1nsec random read/write cycle 1Mb STT-RAM using 6T2MTJ cell with background write for nonvolatile e-memories

2013 Symposium on VLSI Technology, 2013, p.C110-C111

2013

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A 1.88ns 54/spl times/54-bit multiplier in 0.18/spl mu/m CMOS based on multiple-valued differential-pair circuitry

Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005, 2005, p.264-267

2005

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1. Early Diagnosis of Dementia, Including MCI

Nihon Naika Gakkai Zasshi, 2011, Vol.100(8), pp.2109-2115

Hanyu, Haruo

2011

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1 H, 13 C and 15 N resonance assignments of stress granule key component G3BP1 RRM domain

Biomolecular NMR assignments, 2022-04, Vol.16 (1), p.109

2022

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A 1 Mb Nonvolatile Embedded Memory Using 4T2MTJ Cell With 32 b Fine-Grained Power Gating Scheme

IEEE journal of solid-state circuits, 2013-06, Vol.48 (6), p.1511-1520

2013

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A 1-Mb STT-MRAM with zero-array standby power and 1.5-ns quick wake-up by 8-b fine-grained power gating

2013 5th IEEE International Memory Workshop, 2013, p.80-83

2013

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THE 1-MINUTE MENTAL STATUS EXAMINATION IN THE MEMORY CLINIC

Journal of the American Geriatrics Society (JAGS), 2009-06, Vol.57 (6), p.1130-1131

2009

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1. Stereotaxic Atlas of Cat Brain with Basal Horizontal Plane determined by Upper Margin of Orbit and Interaural Line

Neurologia medico-chirurgica, 1967, Vol.9, pp.277a-277a

1967

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10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014, p.184-185

2014

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A 100 nm CMOS technology with "sidewall-notched" 40 nm transistors and SiC-capped Cu/VLK interconnects for high performance microprocessor applications

2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303), 2002, p.66-67

2002

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1043

International journal of radiation oncology, biology, physics, 2006-11, Vol.66 (3), p.S154-S155

2006

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1043: A Prospective Study of Non-Coplanar Conformal Radiotherapy for Stage I NSCLC Using 75Gy / 25 Fractions / 5 Weeks Regimen

International journal of radiation oncology, biology, physics, 2006, Vol.66 (3), p.S154-S155

2006

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116 PROGNOSTIC IMPACT OF THE SHORT-AXIS DIAMETER FOR THE NODAL ASSESSMENT BEFORE PREOPERATIVE CHEMOTHERAPY IN ESOPHAGEAL CANCER

Diseases of the esophagus, 2021-09, Vol.34 (Supplement_1)

2021

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116. Study of TLD Dosimetry : 1 : TLD phosphers characteristics and reprodusibility

Japanese Journal of Radiological Technology, 1994/02/01, Vol.50(2), pp.235

1994

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[11 C]PBB3 PET VISUALIZES TAU AGGREGATES IN PATIENTS WITH FTDP-17 MAPT GENE MUTATION

Alzheimer's & dementia, 2016-07, Vol.12 (7), p.P135-P136

2016

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A 0.15-μs/V Buck-Boost Symbol-Power-Tracking Supply Modulator With Dual Auxiliary Current Paths and EPP Scheme for 5G NR Power Amplifiers

0.25 mu m gate length N-InGaP/InGaAs/GaAs HEMT DCFL circuit with lower power dissipation than high-speed Si CMOS circuits

La 0.3 Sr 0.7 Ti 0.3 Fe 0.7 O 3-δ -Based Electrodes for Symmetrical Solid Oxide Fuel Cells by A-Site Deficiency Manipulation

0.65 V device design with high-performance and high-density 100 nm CMOS technology for low operation power application

0226 Development of CO_2 concentration measurement using photoelectric probing

0590 Reliability of Simple Sleep Evaluation Device at Split-Night Polysomnography

094 IMPACT OF CORONARY ARTERY BYPASS SURGERY ON LONG-TERM OUTCOMES IN PATIENTS WITH HEART FAILURE: FROM THE CREDO-KYOTO PERCUTANEOUS CORONARY INTERVENTION/CORONARY ARTERY BYPASS GRAFT REGISTRY COHORT-2

094IMPACT OF CORONARY ARTERY BYPASS SURGERY ON LONG-TERM OUTCOMES IN PATIENTS WITH HEART FAILURE: FROM THE CREDO-KYOTO PERCUTANEOUS CORONARY INTERVENTION/CORONARY ARTERY BYPASS GRAFT REGISTRY COHORT-2

A 1.5 V-supply 200 MHz pipelined multiplier using multiple-valued current-mode MOS differential logic circuits

A 1.5nsec/2.1nsec random read/write cycle 1Mb STT-RAM using 6T2MTJ cell with background write for nonvolatile e-memories

A 1.5nsec/2.1nsec random read/write cycle 1Mb STT-RAM using 6T2MTJ cell with background write for nonvolatile e-memories

A 1.88ns 54/spl times/54-bit multiplier in 0.18/spl mu/m CMOS based on multiple-valued differential-pair circuitry

1. Early Diagnosis of Dementia, Including MCI

1 H, 13 C and 15 N resonance assignments of stress granule key component G3BP1 RRM domain

A 1 Mb Nonvolatile Embedded Memory Using 4T2MTJ Cell With 32 b Fine-Grained Power Gating Scheme

A 1-Mb STT-MRAM with zero-array standby power and 1.5-ns quick wake-up by 8-b fine-grained power gating

THE 1-MINUTE MENTAL STATUS EXAMINATION IN THE MEMORY CLINIC

1. Stereotaxic Atlas of Cat Brain with Basal Horizontal Plane determined by Upper Margin of Orbit and Interaural Line

10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications

A 100 nm CMOS technology with "sidewall-notched" 40 nm transistors and SiC-capped Cu/VLK interconnects for high performance microprocessor applications

1043

1043: A Prospective Study of Non-Coplanar Conformal Radiotherapy for Stage I NSCLC Using 75Gy / 25 Fractions / 5 Weeks Regimen

116 PROGNOSTIC IMPACT OF THE SHORT-AXIS DIAMETER FOR THE NODAL ASSESSMENT BEFORE PREOPERATIVE CHEMOTHERAPY IN ESOPHAGEAL CANCER

116. Study of TLD Dosimetry : 1 : TLD phosphers characteristics and reprodusibility

[11 C]PBB3 PET VISUALIZES TAU AGGREGATES IN PATIENTS WITH FTDP-17 MAPT GENE MUTATION

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