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A 60-GHz Power Amplifier Design Using Dual-Radial Symmetric Architecture in 90-nm Low-Power CMOS

IEEE transactions on microwave theory and techniques, 2013-03, Vol.61 (3), p.1280-1290

2013

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MMW Ultra-Compact -Way Transformer PAs Using Bowtie-Radial Architecture in 65-nm CMOS

IEEE microwave and wireless components letters, 2015-07, Vol.25 (7), p.460-462

2015

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A multi-mode 60-GHz power amplifier with a novel power combination technique

2012 IEEE Radio Frequency Integrated Circuits Symposium, 2012, p.61-64

2012

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A 24-GHz transformer-based single-in differential-out CMOS low-noise amplifier

2009 IEEE Radio Frequency Integrated Circuits Symposium, 2009, p.299-302

2009

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A 57-66 GHz power amplifier with a linearization technique in 65-nm CMOS process

2014 44th European Microwave Conference, 2014, p.1253-1256

2014

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A 57-66 GHz power amplifier with a linearization technique in 65-nm CMOS process

2014 9th European Microwave Integrated Circuit Conference, 2014, p.309-312

2014

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40-GHz vital sign detection of heartbeat using synchronized motion technique for respiration signal suppression

2012 42nd European Microwave Conference, 2012, p.21-24

2012

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Design of a 60-GHz down-converting dual-gate mixer in 130-nm CMOS technology

2009 European Microwave Conference (EuMC), 2009, p.405-408

2009

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Design of a 0.13-µm V-band millimeter-wave CMOS low-noise amplifier and measurement methodology

2008 Asia-Pacific Microwave Conference, 2008, p.1-4

2008

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Multiple-Molecule Drug Design Based on Systems Biology Approaches and Deep Neural Network to Mitigate Human Skin Aging

Molecules (Basel, Switzerland), 2021-05, Vol.26 (11), p.3178

2021

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Analysis of abnormal threshold voltage shift induced by surface donor state in GaN HEMT on SiC substrate

Applied physics letters, 2022-06, Vol.120 (23)

2022

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Analysis of Edge Effect Occurring in Non-Volatile Ferroelectric Transistors

IEEE electron device letters, 2021-03, Vol.42 (3), p.315-318

2021

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Analysis of Breakdown-Voltage Increase on SiC Junction Barrier Schottky Diode Under Negative Bias Stress

IEEE transactions on electron devices, 2023-01, Vol.70 (1), p.1-5

2023

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Abnormal Two-Stage Degradation Under Hot Carrier Injection With Lateral Double-Diffused MOS With 0.13- \mu m Bipolar-CMOS-DMOS Technology

IEEE transactions on electron devices, 2023-07, Vol.70 (7), p.1-5

2023

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Advanced Low-Temperature-High-Pressure Hydrogen Treatment for Interface Defect Passivation in Si- and SiGe-Channel MOSCAPs

IEEE transactions on electron devices, 2020-12, Vol.67 (12), p.5403-5407

2020

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Comparison of the Hot Carrier Degradation of N- and P-Type Fin Field-Effect Transistors in 14-nm Technology Nodes

IEEE electron device letters, 2021-10, Vol.42 (10), p.1420-1423

2021

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Effect of deposition temperature on electrical properties of one-transistor-one-capacitor (1T1C) FeRAM devices

Applied physics letters, 2020-07, Vol.117 (2)

2020

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Leakage Current in Fast Recovery Diode Suppressed by Low Temperature Supercritical Fluid Treatment Process

IEEE electron device letters, 2020-10, Vol.41 (10), p.1540-1543

2020

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Abnormal trend in hot carrier degradation with fin profile in short channel FinFET devices at 14 nm node

Semiconductor science and technology, 2022-04, Vol.37 (4), p.45010

2022

Volltextzugriff (PDF)

Investigation of degradation mechanism after negative bias temperature stress in Si/SiGe channel metal–oxide–semiconductor capacitors induced by hydrogen diffusion

Semiconductor science and technology, 2022-01, Vol.37 (1), p.15009

2022

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Abnormal Relationship Between Hot Carrier Stress Degradation and Body Current in High-k Metal Gate in the 14-nm Node

IEEE electron device letters, 2019-04, Vol.40 (4), p.498-501

2019

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A Study of Effects of Metal Gate Composition on Performance in Advanced n-MOSFETs

IEEE transactions on electron devices, 2019-08, Vol.66 (8), p.3286-3289

2019

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Cross-Analysis of Land and Runoff Variations in Response to Urbanization on Basin, Watershed, and City Scales with/without Green Infrastructures

Water (Basel), 2018-02, Vol.10 (2), p.106

2018

Volltextzugriff (PDF)

Incorporation of Resistive Random Access Memory into Low‐Temperature Polysilicon Transistor with Fin‐Like Structure as 1T1R Device

Advanced electronic materials, 2020-06, Vol.6 (6), p.n/a

2020

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A built-in self-repair design for RAMs with 2-D redundancy

IEEE transactions on very large scale integration (VLSI) systems, 2005-06, Vol.13 (6), p.742-745

2005

Volltextzugriff (PDF)

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A 60-GHz Power Amplifier Design Using Dual-Radial Symmetric Architecture in 90-nm Low-Power CMOS

MMW Ultra-Compact -Way Transformer PAs Using Bowtie-Radial Architecture in 65-nm CMOS

A multi-mode 60-GHz power amplifier with a novel power combination technique

A 24-GHz transformer-based single-in differential-out CMOS low-noise amplifier

A 57-66 GHz power amplifier with a linearization technique in 65-nm CMOS process

A 57-66 GHz power amplifier with a linearization technique in 65-nm CMOS process

40-GHz vital sign detection of heartbeat using synchronized motion technique for respiration signal suppression

Design of a 60-GHz down-converting dual-gate mixer in 130-nm CMOS technology

Design of a 0.13-µm V-band millimeter-wave CMOS low-noise amplifier and measurement methodology

Multiple-Molecule Drug Design Based on Systems Biology Approaches and Deep Neural Network to Mitigate Human Skin Aging

Analysis of abnormal threshold voltage shift induced by surface donor state in GaN HEMT on SiC substrate

Analysis of Edge Effect Occurring in Non-Volatile Ferroelectric Transistors

Analysis of Breakdown-Voltage Increase on SiC Junction Barrier Schottky Diode Under Negative Bias Stress

Abnormal Two-Stage Degradation Under Hot Carrier Injection With Lateral Double-Diffused MOS With 0.13- \mu m Bipolar-CMOS-DMOS Technology

Advanced Low-Temperature-High-Pressure Hydrogen Treatment for Interface Defect Passivation in Si- and SiGe-Channel MOSCAPs

Comparison of the Hot Carrier Degradation of N- and P-Type Fin Field-Effect Transistors in 14-nm Technology Nodes

Effect of deposition temperature on electrical properties of one-transistor-one-capacitor (1T1C) FeRAM devices

Leakage Current in Fast Recovery Diode Suppressed by Low Temperature Supercritical Fluid Treatment Process

Abnormal trend in hot carrier degradation with fin profile in short channel FinFET devices at 14 nm node

Investigation of degradation mechanism after negative bias temperature stress in Si/SiGe channel metal–oxide–semiconductor capacitors induced by hydrogen diffusion

Abnormal Relationship Between Hot Carrier Stress Degradation and Body Current in High-k Metal Gate in the 14-nm Node

A Study of Effects of Metal Gate Composition on Performance in Advanced n-MOSFETs

Cross-Analysis of Land and Runoff Variations in Response to Urbanization on Basin, Watershed, and City Scales with/without Green Infrastructures

Incorporation of Resistive Random Access Memory into Low‐Temperature Polysilicon Transistor with Fin‐Like Structure as 1T1R Device

A built-in self-repair design for RAMs with 2-D redundancy

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