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A 2.4-3.6-GHz Wideband Subharmonically Injection-Locked PLL With Adaptive Injection Timing Alignment Technique

IEEE transactions on very large scale integration (VLSI) systems, 2017-03, Vol.25 (3), p.929-941

2017

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SiamMixer: A Lightweight and Hardware-Friendly Visual Object-Tracking Network

Sensors (Basel, Switzerland), 2022-02, Vol.22 (4), p.1585

2022

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A Compact High-Quality Image Demosaicking Neural Network for Edge-Computing Devices

Sensors (Basel, Switzerland), 2021-05, Vol.21 (9), p.3265

2021

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A Conv‐GEMM reconfigurable accelerator with WS‐RS dataflow for high throughput processing

Electronics letters, 2024-02, Vol.60 (3), p.n/a

2024

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DT-SCNN: dual-threshold spiking convolutional neural network with fewer operations and memory access for edge applications

Frontiers in computational neuroscience, 2024-05, Vol.18, p.1418115

2024

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Quantizing Oriented Object Detection Network via Outlier-Aware Quantization and IoU Approximation

IEEE signal processing letters, 2020, Vol.27, p.1914-1918

2020

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A Cost-Efficient High-Speed VLSI Architecture for Spiking Convolutional Neural Network Inference Using Time-Step Binary Spike Maps

Sensors (Basel, Switzerland), 2021-09, Vol.21 (18), p.6006

2021

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Low-cost real-time VLSI system for high-accuracy optical flow estimation using biological motion features and random forests

Science China. Information sciences, 2023-05, Vol.66 (5), p.159401, Article 159401

2023

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CMOS image sensors in ISSCC 2023

Journal of semiconductors, 2023-04, Vol.44 (4), p.40202-8

2023

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A 64 × 128 3D-Stacked SPAD Image Sensor for Low-Light Imaging

Sensors (Basel, Switzerland), 2024-07, Vol.24 (13), p.4358

2024

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A High-Speed NMS Coprocessor for Lightweight Ship Detection Algorithm

IEEE transactions on circuits and systems. II, Express briefs, 2022-03, Vol.69 (3), p.1677-1681

2022

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Co-Design and Demonstration of a 25-Gb/s Silicon-Photonic Mach–Zehnder Modulator With a CMOS-Based High-Swing Driver

IEEE journal of selected topics in quantum electronics, 2016-11, Vol.22 (6), p.131-140

2016

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Modeling and Analysis of Noise Reduction Method in SPAD-Based LiDAR System

IEEE photonics journal, 2023-12, Vol.15 (6), p.1-11

2023

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A High-Speed Low-Cost VLSI System Capable of On-Chip Online Learning for Dynamic Vision Sensor Data Classification

Sensors (Basel, Switzerland), 2020-08, Vol.20 (17), p.4715

2020

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A Multi-Channel Data Simulator Based on the Time Unification System

Applied sciences, 2024-07, Vol.14 (13), p.5938

2024

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Neuromorphic vision chips

Science China. Information sciences, 2018-06, Vol.61 (6), p.060421, Article 060421

Wu, Nanjian

2018

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Heterogeneous vision chip and LBP-based algorithm for high-speed tracking

Electronics letters, 2014-03, Vol.50 (6), p.438-439

2014

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High-Speed Target Tracking System Based on a Hierarchical Parallel Vision Processor and Gray-Level LBP Algorithm

IEEE transactions on systems, man, and cybernetics. Systems, 2017-06, Vol.47 (6), p.950-964

2017

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Property-driven functional verification technique for high-speed vision system-on-chip processor

Japanese Journal of Applied Physics, 2017-04, Vol.56 (4S), p.4-04CF15

2017

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Terahertz detector for imaging in 180-nm standard CMOS process

Science China. Information sciences, 2017-08, Vol.60 (8), p.198-206, Article 082401

2017

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2.4-3.2 GHz robust self-injecting injection-locked phase-locked loop

Japanese Journal of Applied Physics, 2018-04, Vol.57 (4S), p.4

2018

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High speed CMOS vision chips

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), 2011, p.1-4

Nanjian Wu

2011

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High-speed visual target tracking with mixed rotation invariant description and skipping searching

Science China. Information sciences, 2017-06, Vol.60 (6), p.221-232, Article 062401

2017

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Compact 0.3-to-1.125 GHz self-biased phase-locked loop for system-on-chip clock generation in 0.18 µm CMOS

Japanese Journal of Applied Physics, 2016-03, Vol.55 (4S), p.4

2016

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A low-power 2.4GHz ZigBee transceiver with inductor-less RF front-end for IoT applications

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017, p.1332-1335

2017

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A 2.4-3.6-GHz Wideband Subharmonically Injection-Locked PLL With Adaptive Injection Timing Alignment Technique

SiamMixer: A Lightweight and Hardware-Friendly Visual Object-Tracking Network

A Compact High-Quality Image Demosaicking Neural Network for Edge-Computing Devices

A Conv‐GEMM reconfigurable accelerator with WS‐RS dataflow for high throughput processing

DT-SCNN: dual-threshold spiking convolutional neural network with fewer operations and memory access for edge applications

Quantizing Oriented Object Detection Network via Outlier-Aware Quantization and IoU Approximation

A Cost-Efficient High-Speed VLSI Architecture for Spiking Convolutional Neural Network Inference Using Time-Step Binary Spike Maps

Low-cost real-time VLSI system for high-accuracy optical flow estimation using biological motion features and random forests

CMOS image sensors in ISSCC 2023

A 64 × 128 3D-Stacked SPAD Image Sensor for Low-Light Imaging

A High-Speed NMS Coprocessor for Lightweight Ship Detection Algorithm

Co-Design and Demonstration of a 25-Gb/s Silicon-Photonic Mach–Zehnder Modulator With a CMOS-Based High-Swing Driver

Modeling and Analysis of Noise Reduction Method in SPAD-Based LiDAR System

A High-Speed Low-Cost VLSI System Capable of On-Chip Online Learning for Dynamic Vision Sensor Data Classification

A Multi-Channel Data Simulator Based on the Time Unification System

Neuromorphic vision chips

Heterogeneous vision chip and LBP-based algorithm for high-speed tracking

High-Speed Target Tracking System Based on a Hierarchical Parallel Vision Processor and Gray-Level LBP Algorithm

Property-driven functional verification technique for high-speed vision system-on-chip processor

Terahertz detector for imaging in 180-nm standard CMOS process

2.4-3.2 GHz robust self-injecting injection-locked phase-locked loop

High speed CMOS vision chips

High-speed visual target tracking with mixed rotation invariant description and skipping searching

Compact 0.3-to-1.125 GHz self-biased phase-locked loop for system-on-chip clock generation in 0.18 µm CMOS

A low-power 2.4GHz ZigBee transceiver with inductor-less RF front-end for IoT applications

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