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A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network

IEEE journal of solid-state circuits, 2014-09, Vol.49 (9), p.2067-2082

2014

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A Programmable Vision Chip Based on Multiple Levels of Parallel Processors

IEEE journal of solid-state circuits, 2011-09, Vol.46 (9), p.2132-2147

2011

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HO-1/PINK1 Regulated Mitochondrial Fusion/Fission to Inhibit Pyroptosis and Attenuate Septic Acute Kidney Injury

BioMed research international, 2020, Vol.2020 (1), p.2148706-2148706

2020

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A CMOS Fully Integrated 860-GHz Terahertz Sensor

IEEE transactions on terahertz science and technology, 2017-07, Vol.7 (4), p.455-465

2017

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Passive and Semi-Passive Wireless Temperature and Humidity Sensors Based on EPC Generation-2 UHF Protocol

IEEE sensors journal, 2015-04, Vol.15 (4), p.2403-2411

2015

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A Programmable SIMD Vision Chip for Real-Time Vision Applications

IEEE journal of solid-state circuits, 2008-06, Vol.43 (6), p.1470-1479

2008

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Silicon-based optoelectronic heterogeneous integration for optical interconnection

Chinese physics B, 2024-01, Vol.33 (2), p.24201

2024

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A Novel Hybrid Phase-Locked-Loop Frequency Synthesizer Using Single-Electron Devices and CMOS Transistors

IEEE transactions on circuits and systems. I, Regular papers, 2007-11, Vol.54 (11), p.2516-2527

2007

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Comparison of comfort and complications of Implantable Venous Access Port (IVAP) with ultrasound guided Internal Jugular Vein (IJV) and Axillary Vein/Subclavian Vein (AxV/SCV) puncture in breast cancer patients: a randomized controlled study

BMC cancer, 2022-03, Vol.22 (1), p.248-248, Article 248

2022

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Novel Hybrid Voltage Controlled Ring Oscillators Using Single Electron and MOS Transistors

IEEE transactions on nanotechnology, 2007-03, Vol.6 (2), p.146-157

2007

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Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network

Applied physics express, 2010-02, Vol.3 (2), p.25002

2010

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Smart Universal Multiple-Valued Logic Gates by Transferring Single Electrons

IEEE transactions on nanotechnology, 2008-07, Vol.7 (4), p.440-450

2008

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Comparison of comfort and complications in breast cancer patients of implantable venous access port (IVAP) with ultrasound guided internal jugular vein (IJV) and axillary vein/subclavian vein (AxV/SCV) puncture: a randomized controlled study protocol

Annals of palliative medicine, 2020-11, Vol.9 (6), p.4323-4331

2020

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Analog-digital and digital-analog converters using single-electron and MOS transistors

IEEE transactions on nanotechnology, 2005-11, Vol.4 (6), p.722-729

2005

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Compact universal logic gates realized using quantization of current in nanodevices

Nanotechnology, 2007-12, Vol.18 (49), p.495201-495201 (8)

2007

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Prevention of Genetic Hypertension by Early Treatment of Spontaneously Hypertensive Rats With the Angiotensin Converting Enzyme Inhibitor Captopril

Hypertension (Dallas, Tex. 1979), 1993-08, Vol.22 (2), p.139-146

1993

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Fabrication and Infrared Optical Properties of Nano Vanadium Dioxide Thin Films

Wuli huaxue xuebao, 2009, Vol.25 (8), p.1523-1529

2009

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A novel architecture of vision chip for fast traffic lane detection and FPGA implementation

2009 IEEE 8th International Conference on ASIC, 2009, p.917-920

2009

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Structure and characterization of the sputtered ZnO, Al-doped ZnO, Ti-doped ZnO and Ti, Al-co-doped ZnO thin films

Materials express, 2015-03, Vol.5 (2), p.153-158

2015

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An ultra-low power CMOS random number generator

Solid-state electronics, 2008-02, Vol.52 (2), p.233-238

2008

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Multiple-Valued Logic Gates Using Asymmetric Single-Electron Transistors

2009 39th International Symposium on Multiple-Valued Logic, 2009, p.337-342

2009

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Single-Electron Multiple-Valued Memory Using Ultra-Small Floating Gate Metal-Oxide-Semiconductor Field Effect Transistor

Japanese Journal of Applied Physics, 2004-10, Vol.43 (No. 10B), p.L1359-L1361

2004

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7.3 A 1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014, p.128-129

2014

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Multi-path Switching Device Utilizing a Multi-terminal Nanowire Junction for MDD-Based Logic Circuit

2009 39th International Symposium on Multiple-Valued Logic, 2009, p.331-336

2009

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Neural progenitor cells resist excitatory amino acid-induced neurotoxicity

Journal of neuroscience research, 2003-01, Vol.71 (2), p.272-278

2003

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A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network

A Programmable Vision Chip Based on Multiple Levels of Parallel Processors

HO-1/PINK1 Regulated Mitochondrial Fusion/Fission to Inhibit Pyroptosis and Attenuate Septic Acute Kidney Injury

A CMOS Fully Integrated 860-GHz Terahertz Sensor

Passive and Semi-Passive Wireless Temperature and Humidity Sensors Based on EPC Generation-2 UHF Protocol

A Programmable SIMD Vision Chip for Real-Time Vision Applications

Silicon-based optoelectronic heterogeneous integration for optical interconnection

A Novel Hybrid Phase-Locked-Loop Frequency Synthesizer Using Single-Electron Devices and CMOS Transistors

Comparison of comfort and complications of Implantable Venous Access Port (IVAP) with ultrasound guided Internal Jugular Vein (IJV) and Axillary Vein/Subclavian Vein (AxV/SCV) puncture in breast cancer patients: a randomized controlled study

Novel Hybrid Voltage Controlled Ring Oscillators Using Single Electron and MOS Transistors

Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network

Smart Universal Multiple-Valued Logic Gates by Transferring Single Electrons

Comparison of comfort and complications in breast cancer patients of implantable venous access port (IVAP) with ultrasound guided internal jugular vein (IJV) and axillary vein/subclavian vein (AxV/SCV) puncture: a randomized controlled study protocol

Analog-digital and digital-analog converters using single-electron and MOS transistors

Compact universal logic gates realized using quantization of current in nanodevices

Prevention of Genetic Hypertension by Early Treatment of Spontaneously Hypertensive Rats With the Angiotensin Converting Enzyme Inhibitor Captopril

Fabrication and Infrared Optical Properties of Nano Vanadium Dioxide Thin Films

A novel architecture of vision chip for fast traffic lane detection and FPGA implementation

Structure and characterization of the sputtered ZnO, Al-doped ZnO, Ti-doped ZnO and Ti, Al-co-doped ZnO thin films

An ultra-low power CMOS random number generator

Multiple-Valued Logic Gates Using Asymmetric Single-Electron Transistors

Single-Electron Multiple-Valued Memory Using Ultra-Small Floating Gate Metal-Oxide-Semiconductor Field Effect Transistor

7.3 A 1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network

Multi-path Switching Device Utilizing a Multi-terminal Nanowire Junction for MDD-Based Logic Circuit

Neural progenitor cells resist excitatory amino acid-induced neurotoxicity

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