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The (0 0 2) exposing facets of WO3 boosting photocatalytic degradation of nitrobenzene

Applied surface science, 2023-01, Vol.607, p.154996, Article 154996

2023

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0><}0{>Remediation Technology for Combined Pollution of Lead and Cadmium in Farmland Soil

Asian agricultural research, 2018-09, Vol.10 (9), p.63-73

1812, 2018

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A 0.004-mm 2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS

IEEE journal of solid-state circuits, 2023-11, Vol.58 (11), p.3179-3193

2023

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A 0.004-mm ^ 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS

IEEE journal of solid-state circuits, 2023-11, p.1-15

2023

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A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS

IEEE journal of solid-state circuits, 2023-11, Vol.58 (11), p.3179

2023

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A 0.0043-mm 2 0.085-μW/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R- RC Network

IEEE transactions on very large scale integration (VLSI) systems, 2023-08, Vol.31 (8), p.1248-1252

2023

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A 0.0043-mm2 0.085-μW/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC Network

IEEE transactions on very large scale integration (VLSI) systems, 2023-08, Vol.31 (8), p.1248-1252

2023

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A 0.0045- [Formula Omitted] 32.4- [Formula Omitted] Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation

IEEE transactions on circuits and systems. II, Express briefs, 2015-03, Vol.62 (3), p.246

2015

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A 0.0045- \hbox^ 32.4- \mu\hbox Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation

IEEE transactions on circuits and systems. II, Express briefs, 2015-03, Vol.62 (3), p.246-250

2015

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A 0.0045- $\hbox{mm}2}$ 32.4- $\mu\hbox{W} $ Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation

IEEE transactions on circuits and systems. II, Express briefs, 2015-03, Vol.62 (3), p.246-250

2015

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0.005% Preservative-Free Latanoprost Induces Dry Eye-Like Ocular Surface Damage via Promotion of Inflammation in Mice

Investigative ophthalmology & visual science, 2018-07, Vol.59 (8), p.3375-3384

2018

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0.005％阿托品滴眼液控制低度近视儿童近视进展的安全性及有效性

国际眼科杂志, 2022-03, Vol.22 (3), p.388-393

2022

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A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI

IEICE transactions on electronics, 2016, Vol.E99.C (6), p.632-640

2016

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A 0.0081mm2 0.15-5.9-GHz Low Noise Amplifier with Noise Cancelling and Current Reuse Techniques

2022 Photonics & Electromagnetics Research Symposium (PIERS), 2022, p.1171-1176

2022

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0.01 GHz to 110 GHz distributed common-gate power detector in standard CMOS 65 nm technology

2017 IEEE MTT-S International Microwave Symposium (IMS), 2017, p.634-637

2017

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0.01％阿托品对亚洲青少年儿童中低度近视屈光度与眼轴影响的Meta分析

国际眼科杂志, 2021-05, Vol.21 (5), p.854-860

2021

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0.010-inch Guidewire in Slender Intervention

Transradial Approach for Percutaneous Interventions, p.253-258

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A 0.011 mm2 PVT-robust fully-synthesizable CDR with a data rate of 10.05 Gb/s in 28nm FD SOI

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.285-288

2014

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A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.181-184

2014

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A 0.02 Ppb/Step Wide Range DCXO Based on Time-Average-Frequency: Demonstration on FPGA

2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, p.1-5

2019

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0.02-wavelengths-thick transmission-type designer wave plate with high efficiency

Journal of physics. D, Applied physics, 2019-09, Vol.52 (37), p.375105

2019

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A 0.022mm2 970µW dual-loop injection-locked PLL with −243dB FOM using synthesizable all-digital PVT calibration circuits

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2013, p.248-249

2013

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A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS

2012 Proceedings of the ESSCIRC (ESSCIRC), 2012, p.377-380

2012

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A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

2011 IEEE International Solid-State Circuits Conference, 2011, p.188-190

2011

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A 0.02mm2Sub-Sampling PLL with Spur Reduction Technique in 90nm CMOS Technology

2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT), 2023, p.1-4

2023

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The (0 0 2) exposing facets of WO3 boosting photocatalytic degradation of nitrobenzene

0><}0{>Remediation Technology for Combined Pollution of Lead and Cadmium in Farmland Soil

A 0.004-mm 2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS

A 0.004-mm ^ 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS

A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS

A 0.0043-mm 2 0.085-μW/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R- RC Network

A 0.0043-mm2 0.085-μW/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC Network

A 0.0045- [Formula Omitted] 32.4- [Formula Omitted] Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation

A 0.0045- \hbox^ 32.4- \mu\hbox Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation

A 0.0045- $\hbox{mm}2}$ 32.4- $\mu\hbox{W} $ Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation

0.005% Preservative-Free Latanoprost Induces Dry Eye-Like Ocular Surface Damage via Promotion of Inflammation in Mice

0.005％阿托品滴眼液控制低度近视儿童近视进展的安全性及有效性

A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI

A 0.0081mm2 0.15-5.9-GHz Low Noise Amplifier with Noise Cancelling and Current Reuse Techniques

0.01 GHz to 110 GHz distributed common-gate power detector in standard CMOS 65 nm technology

0.01％阿托品对亚洲青少年儿童中低度近视屈光度与眼轴影响的Meta分析

0.010-inch Guidewire in Slender Intervention

A 0.011 mm2 PVT-robust fully-synthesizable CDR with a data rate of 10.05 Gb/s in 28nm FD SOI

A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs

A 0.02 Ppb/Step Wide Range DCXO Based on Time-Average-Frequency: Demonstration on FPGA

0.02-wavelengths-thick transmission-type designer wave plate with high efficiency

A 0.022mm2 970µW dual-loop injection-locked PLL with −243dB FOM using synthesizable all-digital PVT calibration circuits

A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS

A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

A 0.02mm2Sub-Sampling PLL with Spur Reduction Technique in 90nm CMOS Technology

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