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Genesis of the Zhaxikang epithermal Pb-Zn-Sb deposit in southern Tibet, China: Evidence for a magmatic link

Ore geology reviews, 2017-01, Vol.80, p.891-909

2017

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Characteristics of Pegmatite-Related Fluids and Significance to Ore- Forming Processes in the Zhaxikang Pb-Zn-Sb Polymetallic Deposit, Tibet, China

Acta geologica Sinica (Beijing), 2015-06, Vol.89 (3), p.811-821

English ed., 2015

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Fluid Inclusion Study of Pegmatite in Zhaxikang Pb-Zn-Sb Polymetallic Deposit, Tibet, China

Acta geologica Sinica (Beijing), 2014-12, Vol.88 (s2), p.1183-1185

English ed., 2014

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Multi-Point Prediction of Aircraft Motion Trajectory Based on GA-Elman-Regularization Neural Network

Integrated ferroelectrics, 2020-09, Vol.210 (1), p.116-127

2020

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A Self‐Disguised Nanospy for Improving Drug Delivery Efficiency via Decreasing Drug Protonation

Small (Weinheim an der Bergstrasse, Germany), 2023-06, Vol.19 (25), p.e2300060-n/a

2023

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Using machine learning techniques for DSP software performance prediction at source code level

Connection science, 2021-01, Vol.33 (1), p.26-41

2021

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Comparing DSP Software Performance Prediction Models at Source Code Level — From Analytical to Statistical

Journal of software, 2019-06, p.247-256

2019

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Instruction Level Loop De-optimization: Loop Rerolling and Software De-pipelining

Computer and Information Science 2015, 2016, p.221-234

2016

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Software performance prediction at source level

2017 IEEE 15th International Conference on Software Engineering Research, Management and Applications (SERA), 2017, p.263-270

2017

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De-pipeline a software-pipelined loop

2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03), 2003, Vol.2, p.II-237

2003

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Software pipelining of nested loops for real-time DSP applications

Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181), 1998, Vol.5, p.3065-3068 vol.5

1998

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GURPR: a new global software pipelining algorithm

International Symposium on Microarchitecture: Proceedings of the 24th annual international symposium on Microarchitecture, 1991, p.212-216

1991

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A scalable loop optimization approach for scalable DSP processors

2000 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.00CH37100), 2000, Vol.6, p.3646-3649 vol.6

2000

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Using timed Petri net to model instruction-level loop scheduling with resource constraints

Journal of computer science and technology, 1994-04, Vol.9 (2), p.128-143

1994

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Foresighted instruction scheduling under timing constraints

IEEE transactions on computers, 1992-09, Vol.41 (9), p.1169-1172

1992

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Loop-carried dependence and the general URPR software pipelining approach (unrolling, pipelining and rerolling)

Proceedings of the Twenty-Fourth Annual Hawaii International Conference on System Sciences, 1991, Vol.ii, p.366-372 vol.2

1991

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Source-level loop optimization for DSP code generation

1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258), 1999, Vol.4, p.2155-2158 vol.4

1999

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DEcomposed software pipelining a new perspective and a new approach

International journal of parallel programming, 1994-06, Vol.22 (3), p.351-373

1994

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URPR-1: A single-chip VLIW architecture

Journal of systems architecture, 1993-11, Vol.39 (1), p.25

1993

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TST — An algorithm for global microcode compaction with timing constraints

Journal of computer science and technology, 1991-01, Vol.6 (1), p.97-107

1991

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Loop optimization with tradeoff between cycle count and code size for DSP applications

2004 12th European Signal Processing Conference, 2004, p.1357-1360

2004

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Subgroup Analysis via Recursive Partitioning

SSRN Electronic Journal

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A study of pointer aliasing for software pipelining using run-time disambiguation

International Symposium on Microarchitecture: Proceedings of the 27th annual international symposium on Microarchitecture; 30 Nov.-02 Dec. 1994, 1994, p.112-117

1994

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A software pipelining based VLIW architecture and optimizing compiler

[1990] Proceedings of the 23rd Annual Workshop and Symposium@m_MICRO 23: Microprogramming and Microarchitecture, 1990, p.17-27

1990

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A study of pointer aliasing for software pipelining using run-time disambiguation

Proceedings of MICRO-27. The 27th Annual IEEE/ACM International Symposium on Microarchitecture, 1994, p.112-117

1994

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Genesis of the Zhaxikang epithermal Pb-Zn-Sb deposit in southern Tibet, China: Evidence for a magmatic link

Characteristics of Pegmatite-Related Fluids and Significance to Ore- Forming Processes in the Zhaxikang Pb-Zn-Sb Polymetallic Deposit, Tibet, China

Fluid Inclusion Study of Pegmatite in Zhaxikang Pb-Zn-Sb Polymetallic Deposit, Tibet, China

Multi-Point Prediction of Aircraft Motion Trajectory Based on GA-Elman-Regularization Neural Network

A Self‐Disguised Nanospy for Improving Drug Delivery Efficiency via Decreasing Drug Protonation

Using machine learning techniques for DSP software performance prediction at source code level

Comparing DSP Software Performance Prediction Models at Source Code Level — From Analytical to Statistical

Instruction Level Loop De-optimization: Loop Rerolling and Software De-pipelining

Software performance prediction at source level

De-pipeline a software-pipelined loop

Software pipelining of nested loops for real-time DSP applications

GURPR: a new global software pipelining algorithm

A scalable loop optimization approach for scalable DSP processors

Using timed Petri net to model instruction-level loop scheduling with resource constraints

Foresighted instruction scheduling under timing constraints

Loop-carried dependence and the general URPR software pipelining approach (unrolling, pipelining and rerolling)

Source-level loop optimization for DSP code generation

DEcomposed software pipelining a new perspective and a new approach

URPR-1: A single-chip VLIW architecture

TST — An algorithm for global microcode compaction with timing constraints

Loop optimization with tradeoff between cycle count and code size for DSP applications

Subgroup Analysis via Recursive Partitioning

A study of pointer aliasing for software pipelining using run-time disambiguation

A software pipelining based VLIW architecture and optimizing compiler

A study of pointer aliasing for software pipelining using run-time disambiguation

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