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0.1 /spl mu/m level contact hole pattern formation with KrF lithography by resolution enhancement lithography assisted by chemical shrink (RELACS)

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217), 1998, p.333-336

1998

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0.1-T human fat/water separation by IDAC

Magnetic resonance in medicine, 1987, Vol.5 (5), p.492-501

1987

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0.1-T human fat/water separation by SIDAC

Magnetic resonance in medicine, 1987-11, Vol.5 (5), p.492-501

1987

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0.2 mu m T-shaped gate 2DEGFETs with an (InAs) (GaAs) short period superlattice channel on a GaAs substrate

International Technical Digest on Electron Devices, 1990, p.503-506

1990

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000307 INTRAOPERATIVE ELECTRICAL STIMULATION OF THE PELVIC SPLANCHNIC NERVES DURING NERVE-SPARING RADICAL HYSTERECTOMY

International journal of gynecological cancer, 2005-09, Vol.15 (Suppl 2), p.136-136

2005

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000384 AN ORPHAN NUCLEAR RECEPTOR DAX-1 IN HUMAN EN-DOMETRIUM AND ITS DISORDERS

International journal of gynecological cancer, 2005-09, Vol.15 (Suppl 2), p.157-157

2005

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000443 PROMOTER METHYLATION STATUS AND EXPRESSION OF CYCLIN D2 GENE IN HUMAN EPITHELIAL OVARIAN CANCER

International journal of gynecological cancer, 2005-09, Vol.15 (Suppl 2), p.174-174

2005

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000459 PHASE I CLINICAL TRIAL OF WEEKLY NEDAPLATIN AND CONCURRENT RADIOTHERAPY FOR ADVANCED CERVICAL CANCER

International journal of gynecological cancer, 2005-09, Vol.15 (Suppl 2), p.178-178

2005

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018 Statistically higher ability of aggregation of FcɛRI by autoantibody against FcɛRI α-chain and IgE of patients with chronic spontaneous urticaria compared with normal subjects

Journal of investigative dermatology, 2018-05, Vol.138 (5), p.S3-S3

2018

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1.5-nm gate oxide CMOS on [110] surface-oriented Si substrate

IEEE transactions on electron devices, 2003-04, Vol.50 (4), p.1001-1008

2003

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1.5-nm gate oxide CMOS on 110 surface-oriented Si substrate

IEEE transactions on electron devices, 2003-04, Vol.50 (4), p.1001-1008

2003

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A 1.7-V adjustable I/O interface for low-voltage fast SRAMs

IEEE journal of solid-state circuits, 1992-04, Vol.27 (4), p.674-677

1992

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A 1.7V Adjustable I/O Interface for Low Voltage Fast SRAMs

1991 Symposium on VLSI Circuits, 1991, p.97-98

1991

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A 1.9-/spl mu/m/sup 2/ loadless CMOS four-transistor SRAM cell in a 0.18-/spl mu/m logic technology

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217), 1998, p.643-646

1998

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1. Intestinal Endometriosis

Nippon Daicho Komonbyō Gakkai zasshi, 1981, Vol.34 (1), p.1-9,55

1981

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1. Intestinal Endometriosis: Report of Cases and Review of Cases in Japan

Nippon Daicho Komonbyo Gakkai Zasshi, 1981, Vol.34(1), pp.1-9,55

1981

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A 1 ns, 1 W, 2.5 V, 32 Kb NTL-CMOS SRAM macro using a memory cell with p-channel access transistors

Proceedings ISSCC '95 - International Solid-State Circuits Conference, 1995, p.306-307

1995

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A 1 ns, 1 W, 2.5 V, 32 Kb NTL-CMOS SRAM macro using a memory cell with PMOS access transistors

IEEE journal of solid-state circuits, 1995-11, Vol.30 (11), p.1196-1202

1995

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A 10-ns 54×54-b parallel structured full array multiplier with 0.5-μm CMOS technology

IEEE journal of solid-state circuits, 1991, Vol.26 (4), p.600-606

1991

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A 10 ns 54×54-bit parallel structured full array multiplier with 0.5 μm CMOS technology

Digest of Technical Papers., 1990 Symposium on VLSI Circuits, 1990, p.125-126

1990

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A 10 ns 5454 b parallel structured full array multiplier with 0.5 mu m CMOS technology

IEEE journal of solid-state circuits, 1991-04, Vol.26 (4), p.600-606

1991

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A 10 ns 54x 54 b parallel structured full array multiplierwith 0.5 mu m CMOS technology

IEEE journal of solid-state circuits, 1991-04, Vol.26 (4), p.600-606

1991

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110 GHz cutoff frequency of ultra-thin gate oxide p-MOSFETs on [110] surface-oriented Si substrate

2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303), 2002, p.156-157

2002

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A 128 kb FeRAM macro for a contact/contactless smart card microcontroller

2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), 2000, p.270-271

2000

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A 128-kb FeRAM macro for contact/contactless smart-card microcontrollers

IEEE journal of solid-state circuits, 2002-08, Vol.37 (8), p.1073-1079

2002

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0.1 /spl mu/m level contact hole pattern formation with KrF lithography by resolution enhancement lithography assisted by chemical shrink (RELACS)

0.1-T human fat/water separation by IDAC

0.1-T human fat/water separation by SIDAC

0.2 mu m T-shaped gate 2DEGFETs with an (InAs) (GaAs) short period superlattice channel on a GaAs substrate

000307 INTRAOPERATIVE ELECTRICAL STIMULATION OF THE PELVIC SPLANCHNIC NERVES DURING NERVE-SPARING RADICAL HYSTERECTOMY

000384 AN ORPHAN NUCLEAR RECEPTOR DAX-1 IN HUMAN EN-DOMETRIUM AND ITS DISORDERS

000443 PROMOTER METHYLATION STATUS AND EXPRESSION OF CYCLIN D2 GENE IN HUMAN EPITHELIAL OVARIAN CANCER

000459 PHASE I CLINICAL TRIAL OF WEEKLY NEDAPLATIN AND CONCURRENT RADIOTHERAPY FOR ADVANCED CERVICAL CANCER

018 Statistically higher ability of aggregation of FcɛRI by autoantibody against FcɛRI α-chain and IgE of patients with chronic spontaneous urticaria compared with normal subjects

1.5-nm gate oxide CMOS on [110] surface-oriented Si substrate

1.5-nm gate oxide CMOS on 110 surface-oriented Si substrate

A 1.7-V adjustable I/O interface for low-voltage fast SRAMs

A 1.7V Adjustable I/O Interface for Low Voltage Fast SRAMs

A 1.9-/spl mu/m/sup 2/ loadless CMOS four-transistor SRAM cell in a 0.18-/spl mu/m logic technology

1. Intestinal Endometriosis

1. Intestinal Endometriosis: Report of Cases and Review of Cases in Japan

A 1 ns, 1 W, 2.5 V, 32 Kb NTL-CMOS SRAM macro using a memory cell with p-channel access transistors

A 1 ns, 1 W, 2.5 V, 32 Kb NTL-CMOS SRAM macro using a memory cell with PMOS access transistors

A 10-ns 54×54-b parallel structured full array multiplier with 0.5-μm CMOS technology

A 10 ns 54×54-bit parallel structured full array multiplier with 0.5 μm CMOS technology

A 10 ns 5454 b parallel structured full array multiplier with 0.5 mu m CMOS technology

A 10 ns 54x 54 b parallel structured full array multiplierwith 0.5 mu m CMOS technology

110 GHz cutoff frequency of ultra-thin gate oxide p-MOSFETs on [110] surface-oriented Si substrate

A 128 kb FeRAM macro for a contact/contactless smart card microcontroller

A 128-kb FeRAM macro for contact/contactless smart-card microcontrollers

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