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Evaluation of SPN-Based Lightweight Crypto-Ciphers

IEEE access, 2019, Vol.7, p.10559-10567

2019

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Practical Experiments to Evaluate Quality Metrics of MRAM-Based Physical Unclonable Functions

IEEE access, 2020-01, Vol.8, p.176042-176049

2020

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Attacking Randomized Exponentiations Using Unsupervised Learning

Constructive Side-Channel Analysis and Secure Design, 2014, Vol.8622, p.144-160

2014

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Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power microcontrollers

IEEE access, 2019-01, Vol.7, p.1-1

2019

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Foundations of Hardware IP Protection

1st ed. 2017 edition., 2017

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Practical Experiments on Fabricated TAS-MRAM Dies to Evaluate the Stochastic Behavior of Voltage-Controlled TRNGs

IEEE access, 2019, Vol.7, p.59271-59277

2019

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TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks

Cryptographic Hardware and Embedded Systems - CHES 2007, 2007, p.289-302

2007

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Embedded Memory Hierarchy Exploration Based on Magnetic Random Access Memory

Journal of low power electronics and applications, 2014-08, Vol.4 (3), p.214-230

2014

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Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence

IEEE transactions on very large scale integration (VLSI) systems, 2012-03, Vol.20 (3), p.573-577

2012

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Trends on the application of emerging nonvolatile memory to processors and programmable devices

2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2013, p.101-104

2013

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Analysis and Enhancement of Random Number Generator in FPGA Based on Oscillator Rings

International Journal of Reconfigurable Computing, 2009-01, Vol.2009 (2009), p.1-8

2009

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True-Randomness and Pseudo-Randomness in Ring Oscillator-Based True Random Number Generators

International Journal of Reconfigurable Computing, 2010-01, Vol.2010 (2010), p.1-13

2010

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Power management through DVFS and dynamic body biasing in FD-SOI circuits

2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 2014, p.1-6

2014

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Demystifying the TensorFlow Eager Execution of Deep Learning Inference on a CPU-GPU Tandem

2022 25th Euromicro Conference on Digital System Design (DSD), 2022, p.446-455

2022

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Addressing the Thermal Issues of STT-MRAM From Compact Modeling to Design Techniques

IEEE transactions on nanotechnology, 2018-03, Vol.17 (2), p.345-352

2018

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Spin-Transfer Torque Magnetic Tunnel Junction for Single-Event Effects Mitigation in IC Design

IEEE transactions on nuclear science, 2020-07, Vol.67 (7), p.1674-1681

2020

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Selected Papers from ReConFig 2008

International Journal of Reconfigurable Computing, 2009-01, Vol.2009 (2009), p.1-2

2009

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A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions

IEEE transactions on circuits and systems. I, Regular papers, 2018-02, Vol.65 (2), p.700-711

2018

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3D Network-on-Chip Architectures Using Homogeneous Meshes and Heterogeneous Floorplans

International Journal of Reconfigurable Computing, 2010-01, Vol.2010 (2010), p.1-12

2010

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A Design-Time Method for Building Cost-Effective Run-Time Power Monitoring

IEEE transactions on computer-aided design of integrated circuits and systems, 2017-07, Vol.36 (7), p.1153-1166

2017

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Pref-X: a framework to reveal data prefetching in commercial in-order cores

Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022, p.1051-1056

2022

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Heavy-Ion Irradiation Effects on Advanced Perpendicular Anisotropy Spin-Transfer Torque Magnetic Tunnel Junction

IEEE transactions on nuclear science, 2021-05, Vol.68 (5), p.588-596

2021

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Multi-Level Analysis of GPU Utilization in ML Training Workloads

2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2024, p.1-6

2024

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SEU Mechanisms in Spintronic Devices: Critical Parameters and Basic Effects

IEEE transactions on nuclear science, 2021-08, Vol.68 (8), p.1533-1541

2021

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Selected Papers from ReconFig 2009 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2009)

International Journal of Reconfigurable Computing, 2010-01, Vol.2010 (2010), p.1-2

2010

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Evaluation of SPN-Based Lightweight Crypto-Ciphers

Practical Experiments to Evaluate Quality Metrics of MRAM-Based Physical Unclonable Functions

Attacking Randomized Exponentiations Using Unsupervised Learning

Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power microcontrollers

Foundations of Hardware IP Protection

Practical Experiments on Fabricated TAS-MRAM Dies to Evaluate the Stochastic Behavior of Voltage-Controlled TRNGs

TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks

Embedded Memory Hierarchy Exploration Based on Magnetic Random Access Memory

Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence

Trends on the application of emerging nonvolatile memory to processors and programmable devices

Analysis and Enhancement of Random Number Generator in FPGA Based on Oscillator Rings

True-Randomness and Pseudo-Randomness in Ring Oscillator-Based True Random Number Generators

Power management through DVFS and dynamic body biasing in FD-SOI circuits

Demystifying the TensorFlow Eager Execution of Deep Learning Inference on a CPU-GPU Tandem

Addressing the Thermal Issues of STT-MRAM From Compact Modeling to Design Techniques

Spin-Transfer Torque Magnetic Tunnel Junction for Single-Event Effects Mitigation in IC Design

Selected Papers from ReConFig 2008

A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions

3D Network-on-Chip Architectures Using Homogeneous Meshes and Heterogeneous Floorplans

A Design-Time Method for Building Cost-Effective Run-Time Power Monitoring

Pref-X: a framework to reveal data prefetching in commercial in-order cores

Heavy-Ion Irradiation Effects on Advanced Perpendicular Anisotropy Spin-Transfer Torque Magnetic Tunnel Junction

Multi-Level Analysis of GPU Utilization in ML Training Workloads

SEU Mechanisms in Spintronic Devices: Critical Parameters and Basic Effects

Selected Papers from ReconFig 2009 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2009)

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