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A 5-GS/s 10-b 76-mW Time-Interleaved SAR ADC in 28 nm CMOS

IEEE transactions on circuits and systems. I, Regular papers, 2017-07, Vol.64 (7), p.1673-1683

2017

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Built-in Self-Calibration and Digital-Trim Technique for 14-Bit SAR ADCs Achieving ±1 LSB INL

IEEE transactions on very large scale integration (VLSI) systems, 2015-05, Vol.23 (5), p.916-925

2015

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Self-Calibration And Digital-Trimming Of Successive Approximation Analog-To-Digital Converters

Thirunakkarasu, Shankar

2014

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Reduction in the area of a high voltage multiplexer

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), 2014, p.282-285

2014

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A 5GS/s 10b 76mW time-interleaved SAR ADC in 28nm CMOS

2015 IEEE Custom Integrated Circuits Conference (CICC), 2015, p.1-4

2015

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A radix-3 SAR analog-to-digital converter

2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, p.1460-1463

2010

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Derivative-free active-RC elliptic filter using cascade of biquads in 28 nm CMOS

2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), 2015, p.1-4

2015

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Sigma delta modulators with modified hybrid integrators

2008 51st Midwest Symposium on Circuits and Systems, 2008, p.642-645

2008

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Current Pumping and Voltage Pulling to Maximize Speed: An Application to a 2.5 Gsps Flash ADC in 350 nm Standard CMOS Process

2008 International Conference on Advanced Computer Theory and Engineering, 2008, p.1100-1103

2008

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A 5-GS/s 10-b 76-mW Time-Interleaved SAR ADC in 28 nm CMOS

Built-in Self-Calibration and Digital-Trim Technique for 14-Bit SAR ADCs Achieving ±1 LSB INL

Self-Calibration And Digital-Trimming Of Successive Approximation Analog-To-Digital Converters

Reduction in the area of a high voltage multiplexer

A 5GS/s 10b 76mW time-interleaved SAR ADC in 28nm CMOS

A radix-3 SAR analog-to-digital converter

Derivative-free active-RC elliptic filter using cascade of biquads in 28 nm CMOS

Sigma delta modulators with modified hybrid integrators

Current Pumping and Voltage Pulling to Maximize Speed: An Application to a 2.5 Gsps Flash ADC in 350 nm Standard CMOS Process

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