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Universality of trap-induced mobility fluctuations between 1/f noise and random telegraph noise in nanoscale FD-SOI MOSFETs

Applied physics letters, 2023-06, Vol.122 (23)

2023

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Effect of Gate Structure on the Trapping Behavior of GaN Junctionless FinFETs

IEEE electron device letters, 2020-06, Vol.41 (6), p.832-835

2020

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Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs

IEEE transactions on electron devices, 2020-02, Vol.67 (2), p.424-429

2020

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All Operation Region Characterization and Modeling of Drain and Gate Current Mismatch in 14-nm Fully Depleted SOI MOSFETs

IEEE transactions on electron devices, 2017-05, Vol.64 (5), p.2080-2085, Article 2080

2017

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Low-Frequency Noise Characteristics of GaN Nanowire Gate-All-Around Transistors With/Without 2-DEG Channel

IEEE transactions on electron devices, 2019-03, Vol.66 (3), p.1243-1248

2019

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Comparison for 1/ f Noise Characteristics of AlGaN/GaN FinFET and Planar MISHFET

IEEE transactions on electron devices, 2017-09, Vol.64 (9), p.3634-3638

2017

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Low-Frequency Noise Sources in Advanced UTBB FD-SOI MOSFETs

IEEE transactions on electron devices, 2014-04, Vol.61 (4), p.1161-1167

2014

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Origin of Low-Frequency Noise in Triple-Gate Junctionless n-MOSFETs

IEEE transactions on electron devices, 2018-12, Vol.65 (12), p.5481-5486

2018

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Drain-Current Flicker Noise Modeling in nMOSFETs From a 14-nm FDSOI Technology

IEEE transactions on electron devices, 2015-05, Vol.62 (5), p.1574-1579

2015

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Characterization and Modeling of NBTI in Nanoscale UltraThin Body UltraThin Box FD-SOI MOSFETs

IEEE transactions on electron devices, 2016-12, Vol.63 (12), p.4913-4918

2016

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Study of Hot-Carrier-Induced Traps in Nanoscale UTBB FD-SOI MOSFETs by Low-Frequency Noise Measurements

IEEE transactions on electron devices, 2016-08, Vol.63 (8), p.3222-3228

2016

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Model Implementation of Lorentzian Spectra for Circuit Noise Simulations in the Frequency Domain

IEEE journal of the Electron Devices Society, 2022-01, Vol.10, p.611-619

2022

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Analytical Modeling of Threshold Voltage and Interface Ideality Factor of Nanoscale Ultrathin Body and Buried Oxide SOI MOSFETs With Back Gate Control

IEEE transactions on electron devices, 2014-04, Vol.61 (4), p.969-975

2014

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Comparison for 1/ Noise Characteristics of AlGaN/GaN FinFET and Planar MISHFET

IEEE transactions on electron devices, 2017-09, Vol.64 (9), p.3634-3638

2017

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Analytical Compact Model for Lightly Doped Nanoscale Ultrathin-Body and Box SOI MOSFETs With Back-Gate Control

IEEE transactions on electron devices, 2015-10, Vol.62 (10), p.3117-3124

2015

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Effects of Contact Potential and Sidewall Surface Plane on the Performance of GaN Vertical Nanowire MOSFETs for Low-Voltage Operation

IEEE transactions on electron devices, 2020-04, Vol.67 (4), p.1547-1552

2020

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Origin of Low-Frequency Noise in the Low Drain Current Range of Bottom-Gate Amorphous IGZO Thin-Film Transistors

IEEE electron device letters, 2011-07, Vol.32 (7), p.898-900

2011

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Parasitic Coupling in 3D Sequential Integration: The Example of a Two-Layer 3D Pixel

Technologies (Basel), 2022-04, Vol.10 (2), p.38

2022

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Chaotic Behavior of Random Telegraph Noise in Nanoscale UTBB FD-SOI MOSFETs

IEEE electron device letters, 2017-04, Vol.38 (4), p.517-520

2017

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Charge Pumping in Ultrathin SOI Tunnel FETs: Impact of Back-Gate Voltage

ECS transactions, 2019-04, Vol.89 (3), p.111-120

2019

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Dynamic variability in 14nm FD-SOI MOSFETs and transient simulation methodology

Solid-state electronics, 2015-09, Vol.111, p.100-103

2015

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Noise-induced dynamic variability in nano-scale CMOS SRAM cells

2016 46th European Solid-State Device Research Conference (ESSDERC), 2016, p.256-259

2016

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Optimization of GOPS-Based Functionalization Process and Impact of Aptamer Grafting on the Si Nanonet FET Electrical Properties as First Steps towards Thrombin Electrical Detection

Nanomaterials (Basel, Switzerland), 2020-09, Vol.10 (9), p.1842

2020

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A Method for Series-Resistance-Immune Extraction of Low-Frequency Noise Parameters in Nanoscale MOSFETs

IEEE transactions on electron devices, 2020-11, Vol.67 (11), p.4568-4572

2020

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New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs

2015 IEEE International Reliability Physics Symposium, 2015, p.XT.1.1-XT.1.6

2015

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Universality of trap-induced mobility fluctuations between 1/f noise and random telegraph noise in nanoscale FD-SOI MOSFETs

Effect of Gate Structure on the Trapping Behavior of GaN Junctionless FinFETs

Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs

All Operation Region Characterization and Modeling of Drain and Gate Current Mismatch in 14-nm Fully Depleted SOI MOSFETs

Low-Frequency Noise Characteristics of GaN Nanowire Gate-All-Around Transistors With/Without 2-DEG Channel

Comparison for 1/ f Noise Characteristics of AlGaN/GaN FinFET and Planar MISHFET

Low-Frequency Noise Sources in Advanced UTBB FD-SOI MOSFETs

Origin of Low-Frequency Noise in Triple-Gate Junctionless n-MOSFETs

Drain-Current Flicker Noise Modeling in nMOSFETs From a 14-nm FDSOI Technology

Characterization and Modeling of NBTI in Nanoscale UltraThin Body UltraThin Box FD-SOI MOSFETs

Study of Hot-Carrier-Induced Traps in Nanoscale UTBB FD-SOI MOSFETs by Low-Frequency Noise Measurements

Model Implementation of Lorentzian Spectra for Circuit Noise Simulations in the Frequency Domain

Analytical Modeling of Threshold Voltage and Interface Ideality Factor of Nanoscale Ultrathin Body and Buried Oxide SOI MOSFETs With Back Gate Control

Comparison for 1/ Noise Characteristics of AlGaN/GaN FinFET and Planar MISHFET

Analytical Compact Model for Lightly Doped Nanoscale Ultrathin-Body and Box SOI MOSFETs With Back-Gate Control

Effects of Contact Potential and Sidewall Surface Plane on the Performance of GaN Vertical Nanowire MOSFETs for Low-Voltage Operation

Origin of Low-Frequency Noise in the Low Drain Current Range of Bottom-Gate Amorphous IGZO Thin-Film Transistors

Parasitic Coupling in 3D Sequential Integration: The Example of a Two-Layer 3D Pixel

Chaotic Behavior of Random Telegraph Noise in Nanoscale UTBB FD-SOI MOSFETs

Charge Pumping in Ultrathin SOI Tunnel FETs: Impact of Back-Gate Voltage

Dynamic variability in 14nm FD-SOI MOSFETs and transient simulation methodology

Noise-induced dynamic variability in nano-scale CMOS SRAM cells

Optimization of GOPS-Based Functionalization Process and Impact of Aptamer Grafting on the Si Nanonet FET Electrical Properties as First Steps towards Thrombin Electrical Detection

A Method for Series-Resistance-Immune Extraction of Low-Frequency Noise Parameters in Nanoscale MOSFETs

New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs

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