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A Reference-Less Clock and Data Recovery Circuit Using Phase-Rotating Phase-Locked Loop

IEEE journal of solid-state circuits, 2014-04, Vol.49 (4), p.1036-1047

2014

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IEEE_Xplore

Design and Analysis of Low-Power High-Frequency Robust Sub-Harmonic Injection-Locked Clock Multipliers

IEEE journal of solid-state circuits, 2015-12, Vol.50 (12), p.3160-3174

2015

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IEEE_Xplore

A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition

IEEE journal of solid-state circuits, 2016-02, Vol.51 (2), p.428-439

2016

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IEEE_Xplore

Analog Filter Design Using Ring Oscillator Integrators

IEEE journal of solid-state circuits, 2012-12, Vol.47 (12), p.3120-3129

2012

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IEEE_Xplore

A 12-Gb/s -16.8-dBm OMA Sensitivity 23-mW Optical Receiver in 65-nm CMOS

IEEE journal of solid-state circuits, 2018-02, Vol.53 (2), p.445-457

2018

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IEEE_Xplore

A 16-mW 78-dB SNDR 10-MHz BW CT ΔΣ ADC Using Residue-Cancelling VCO-Based Quantizer

IEEE journal of solid-state circuits, 2012, Vol.47 (12), p.2916-2927

2012

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A 16-mW 78-dB SNDR 10-MHz BW CT \Delta \Sigma ADC Using Residue-Cancelling VCO-Based Quantizer

IEEE journal of solid-state circuits, 2012-12, Vol.47 (12), p.2916-2927

2012

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IEEE_Xplore

A 7 Gb/s Embedded Clock Transceiver for Energy Proportional Links

IEEE journal of solid-state circuits, 2015-12, Vol.50 (12), p.3101-3119

2015

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IEEE_Xplore

A 0.45-0.7 V 1-6 Gb/s 0.29-0.58 pJ/b Source-Synchronous Transceiver Using Near-Threshold Operation

IEEE journal of solid-state circuits, 2018-03, Vol.53 (3), p.884-895

2018

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IEEE_Xplore

A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver

IEEE journal of solid-state circuits, 2017-05, Vol.52 (5), p.1399-1411

2017

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IEEE_Xplore

A 5 Gb/s, 10 ns Power-On-Time, 36 $\mu$ W Off-State Power, Fast Power-On Transmitter for Energy Proportional Links

IEEE journal of solid-state circuits, 2014-10, Vol.49 (10), p.2243-2258

2014

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An 8 Gb/s-64 Mb/s, 2.3-4.2 mW/Gb/s Burst-Mode Transmitter in 90 nm CMOS

IEEE journal of solid-state circuits, 2014-10, Vol.49 (10), p.2228-2242

2014

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IEEE_Xplore

A 5GHz Digital Fractional- N PLL Using a 1-bit Delta–Sigma Frequency-to-Digital Converter in 65 nm CMOS

IEEE journal of solid-state circuits, 2017-09, Vol.52 (9), p.2306-2320

2017

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IEEE_Xplore

A 5 Gb/s, 10 ns Power-On-Time, 36 \muW Off-State Power, Fast Power-On Transmitter for Energy Proportional Links

IEEE journal of solid-state circuits, 2014-10, Vol.49 (10), p.2243-2258

2014

Link zum Volltext
IEEE_Xplore

A TDC-Less 7 mW 2.5 Gb/s Digital CDR With Linear Loop Dynamics and Offset-Free Data Recovery

IEEE journal of solid-state circuits, 2011-12, Vol.46 (12), p.3163-3173

2011

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IEEE_Xplore

10.7 A 6.75-to-8.25GHz 2.25mW 190fsrms integrated-jitter PVT-insensitive injection-locked clock multiplier using all-digital continuous frequency-tracking loop in 65nm CMOS

2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers, 2015, p.1-3

2015

Link zum Volltext
IEEE_Xplore

A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer

2012 IEEE International Solid-State Circuits Conference, 2012, p.152-154

2012

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IEEE_Xplore

A 0.7V time-based inductor for fully integrated low bandwidth filter applications

2017 IEEE Custom Integrated Circuits Conference (CICC), 2017, p.1-4

2017

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IEEE_Xplore

Digital clock and data recovery circuit design: Challenges and tradeoffs

2011 IEEE Custom Integrated Circuits Conference (CICC), 2011, p.1-8

2011

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IEEE_Xplore

Design of energy efficient high speed I/O interfaces

Talegaonkar, Mrunmay Vyankatesh

2016

Link zum Volltext
ProQuest

29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS

2017 IEEE International Solid-State Circuits Conference (ISSCC), 2017, p.492-493

2017

Link zum Volltext
IEEE_Xplore

A 0.55V 61dB-SNR 67dB-SFDR 7MHz 4th-order Butterworth filter using ring-oscillator-based integrators in 90nm CMOS

2012 IEEE International Solid-State Circuits Conference, 2012, p.360-362

2012

Link zum Volltext
IEEE_Xplore

3.7 A 7Gb/s rapid on/off embedded-clock serial-link transceiver with 20ns power-on time, 740μW off-state power for energy-proportional links in 65nm CMOS

2015 IEEE International Solid State Circuits Conference (ISSCC), 2015, p.1-3

2015

Link zum Volltext
IEEE_Xplore

3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS

2015 IEEE International Solid State Circuits Conference (ISSCC), 2015, p.1-3

2015

Link zum Volltext
IEEE_Xplore

23.1 A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS

2016 IEEE International Solid-State Circuits Conference (ISSCC), 2016, p.398-399

2016

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IEEE_Xplore

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A Reference-Less Clock and Data Recovery Circuit Using Phase-Rotating Phase-Locked Loop

Design and Analysis of Low-Power High-Frequency Robust Sub-Harmonic Injection-Locked Clock Multipliers

A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition

Analog Filter Design Using Ring Oscillator Integrators

A 12-Gb/s -16.8-dBm OMA Sensitivity 23-mW Optical Receiver in 65-nm CMOS

A 16-mW 78-dB SNDR 10-MHz BW CT ΔΣ ADC Using Residue-Cancelling VCO-Based Quantizer

A 16-mW 78-dB SNDR 10-MHz BW CT \Delta \Sigma ADC Using Residue-Cancelling VCO-Based Quantizer

A 7 Gb/s Embedded Clock Transceiver for Energy Proportional Links

A 0.45-0.7 V 1-6 Gb/s 0.29-0.58 pJ/b Source-Synchronous Transceiver Using Near-Threshold Operation

A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver

A 5 Gb/s, 10 ns Power-On-Time, 36 $\mu$ W Off-State Power, Fast Power-On Transmitter for Energy Proportional Links

An 8 Gb/s-64 Mb/s, 2.3-4.2 mW/Gb/s Burst-Mode Transmitter in 90 nm CMOS

A 5GHz Digital Fractional- N PLL Using a 1-bit Delta–Sigma Frequency-to-Digital Converter in 65 nm CMOS

A 5 Gb/s, 10 ns Power-On-Time, 36 \muW Off-State Power, Fast Power-On Transmitter for Energy Proportional Links

A TDC-Less 7 mW 2.5 Gb/s Digital CDR With Linear Loop Dynamics and Offset-Free Data Recovery

10.7 A 6.75-to-8.25GHz 2.25mW 190fsrms integrated-jitter PVT-insensitive injection-locked clock multiplier using all-digital continuous frequency-tracking loop in 65nm CMOS

A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer

A 0.7V time-based inductor for fully integrated low bandwidth filter applications

Digital clock and data recovery circuit design: Challenges and tradeoffs

Design of energy efficient high speed I/O interfaces

29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS

A 0.55V 61dB-SNR 67dB-SFDR 7MHz 4th-order Butterworth filter using ring-oscillator-based integrators in 90nm CMOS

3.7 A 7Gb/s rapid on/off embedded-clock serial-link transceiver with 20ns power-on time, 740μW off-state power for energy-proportional links in 65nm CMOS

3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS

23.1 A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS

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