UB Paderborn / Katalog / Suche / in CDI

Toward multistandard mobile terminals - fully integrated receivers requirements and architectures

IEEE transactions on microwave theory and techniques, 2005-03, Vol.53 (3), p.1026-1038

2005

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Analysis of reliability and power efficiency in cascode class-E PAs

IEEE journal of solid-state circuits, 2006-05, Vol.41 (5), p.1222-1229

2006

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Analysis and design of injection-locked LC dividers for quadrature generation

IEEE journal of solid-state circuits, 2004-09, Vol.39 (9), p.1425-1433

2004

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Second-order intermodulation mechanisms in CMOS downconverters

IEEE journal of solid-state circuits, 2003-03, Vol.38 (3), p.394-406

2003

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A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques

IEEE journal of solid-state circuits, 2009-03, Vol.44 (3), p.824-834

2009

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0.5–50 GHz dielectric characterisation of breast cancer tissues

Electronics letters, 2015-06, Vol.51 (13), p.974-975

2015

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A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers

IEEE journal of solid-state circuits, 2006-03, Vol.41 (3), p.552-559

2006

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A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications

IEEE journal of solid-state circuits, 2008-08, Vol.43 (8), p.1755-1762

2008

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On the amplitude and phase errors of quadrature LC-tank CMOS oscillators

IEEE journal of solid-state circuits, 2006-06, Vol.41 (6), p.1305-1313

2006

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Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations

IEEE journal of solid-state circuits, 2009-09, Vol.44 (9), p.2605-2615

2009

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A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications

IEEE journal of solid-state circuits, 2005-03, Vol.40 (3), p.690-697

2005

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A Magnetically Tuned Quadrature Oscillator

IEEE journal of solid-state circuits, 2007-12, Vol.42 (12), p.2870-2877

2007

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A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS

IEEE journal of solid-state circuits, 2007-06, Vol.42 (6), p.1310-1317

2007

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A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise and high phase accuracy

IEEE transactions on circuits and systems. I, Regular papers, 2006-03, Vol.53 (3), p.554-560

2006

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A 1.3 GHz low-phase noise fully tunable CMOS LC VCO

IEEE journal of solid-state circuits, 2000-03, Vol.35 (3), p.356-361

2000

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A 2-dB noise figure 900-MHz differential CMOS LNA

IEEE journal of solid-state circuits, 2001-10, Vol.36 (10), p.1444-1452

2001

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Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic Latches With Load Modulation

IEEE journal of solid-state circuits, 2013-08, Vol.48 (8), p.1842-1850

2013

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A metal-oxide-semiconductor varactor

IEEE electron device letters, 1999-04, Vol.20 (4), p.164-166

1999

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A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves

IEEE journal of solid-state circuits, 2011-12, Vol.46 (12), p.2943-2955

2011

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Analysis and Design of a Double-Quadrature CMOS VCO for Subharmonic Mixing at Ka-Band

IEEE transactions on microwave theory and techniques, 2008-02, Vol.56 (2), p.355-363

2008

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A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS

IEEE transactions on circuits and systems. I, Regular papers, 2011-01, Vol.58 (1), p.88-97

2011

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Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers

IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 2005-03, Vol.52 (3), p.117-121

2005

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Noise analysis of submicron PMOS in NWELL

Nuclear physics. Section B, Proceedings supplement, 1998-02, Vol.61 (3), p.539-544

Svelto, F.

1998

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A 20 mW 3.24 }^ Fully Integrated GPS Radio for Location Based Services

IEEE journal of solid-state circuits, 2007-03, Vol.42 (3), p.602-612

2007

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A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS

IEEE journal of solid-state circuits, 2011-03, Vol.46 (3), p.551-561

2011

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Toward multistandard mobile terminals - fully integrated receivers requirements and architectures

Analysis of reliability and power efficiency in cascode class-E PAs

Analysis and design of injection-locked LC dividers for quadrature generation

Second-order intermodulation mechanisms in CMOS downconverters

A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques

0.5–50 GHz dielectric characterisation of breast cancer tissues

A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers

A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications

On the amplitude and phase errors of quadrature LC-tank CMOS oscillators

Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations

A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications

A Magnetically Tuned Quadrature Oscillator

A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS

A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise and high phase accuracy

A 1.3 GHz low-phase noise fully tunable CMOS LC VCO

A 2-dB noise figure 900-MHz differential CMOS LNA

Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic Latches With Load Modulation

A metal-oxide-semiconductor varactor

A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves

Analysis and Design of a Double-Quadrature CMOS VCO for Subharmonic Mixing at Ka-Band

A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS

Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers

Noise analysis of submicron PMOS in NWELL

A 20 mW 3.24 }^ Fully Integrated GPS Radio for Location Based Services

A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS

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