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Advanced CMOS technology portfolio for RF IC applications

IEEE transactions on electron devices, 2005-07, Vol.52 (7), p.1324-1334

2005

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CMOS technology for MS/RF SoC

IEEE transactions on electron devices, 2003-03, Vol.50 (3), p.557-566

2003

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Characteristics of SOI FET's under pulsed conditions

IEEE transactions on electron devices, 1997-11, Vol.44 (11), p.1923-1930

1997

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Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era

IEEE journal of solid-state circuits, 2003-03, Vol.38 (3), p.444-449

2003

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Hot carrier reliability improvement by utilizing phosphorus transient enhanced diffusion for input/output devices of deep submicron CMOS technology

IEEE electron device letters, 2000-12, Vol.21 (12), p.598-600

2000

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Arsenic/phosphorus LDD optimization by taking advantage of phosphorus transient enhanced diffusion for high voltage input/output CMOS devices

IEEE transactions on electron devices, 2002-01, Vol.49 (1), p.67-71

2002

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A floating well method for exact capacitance-voltage measurement of nano technology

IEEE transactions on electron devices, 2003-06, Vol.50 (6), p.1543-1544

2003

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A high-performance 0.25- mu m CMOS technology. II. Technology

IEEE transactions on electron devices, 1992-04, Vol.39 (4), p.967-975

1992

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Submicrometer-channel CMOS for low-temperature operation

IEEE transactions on electron devices, 1987-01, Vol.34 (1), p.19-27

1987

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High-performance devices for a 0.15- mu m CMOS technology

IEEE electron device letters, 1993-10, Vol.14 (10), p.466-468

1993

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Si/SiGe epitaxial-base transistors. I. Materials, physics, and circuits

IEEE transactions on electron devices, 1995-03, Vol.42 (3), p.455-468

1995

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On the accuracy of channel length characterization of LDD MOSFET's

IEEE transactions on electron devices, 1986-10, Vol.33 (10), p.1556-1562

1986

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On the profile design and optimization of epitaxial Si- and SiGe-base bipolar technology for 77 K applications. II. Circuit performance issues

IEEE transactions on electron devices, 1993-03, Vol.40 (3), p.542-556

1993

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On the profile design and optimization of epitaxial Si- and SiGe-base bipolar technology for 77 K applications. I. Transistor DC design considerations

IEEE transactions on electron devices, 1993-03, Vol.40 (3), p.525-541

1993

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Geometry effects in MOSFET channel length extraction algorithms

IEEE electron device letters, 1985-04, Vol.6 (4), p.186-188

1985

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Integrated power transistor in 0.18-[mu]m CMOS technology for RF system-on-chip applications

IEEE transactions on microwave theory and techniques, 2002-12, Vol.50 (12), p.2873

2002

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Integrated power transistor in 0.18-/spl mu/m CMOS technology for RF system-on-chip applications

IEEE transactions on microwave theory and techniques, 2002-12, Vol.50 (12), p.2873-2881

2002

Volltextzugriff (PDF)

Integrated power transistor in 0.18-μm CMOS technology for RF system-on-chip applications

IEEE transactions on microwave theory and techniques, 2002-12, Vol.50 (12), p.2873-2881

2002

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Measurement of I-V curves of silicon-on-insulator (SOI) MOSFET's without self-heating

IEEE electron device letters, 1995-04, Vol.16 (4), p.145-147

1995

Volltextzugriff (PDF)

On the transient operation of partially depleted SOI NMOSFET's

IEEE electron device letters, 1995-11, Vol.16 (11), p.497-499

1995

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History dependence of output characteristics of silicon-on-insulator (SOI) MOSFETs

IEEE electron device letters, 1996-01, Vol.17 (1), p.7-9

1996

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An epitaxial emitter-cap SiGe-base bipolar technology optimized for liquid-nitrogen temperature operation

IEEE electron device letters, 1994-11, Vol.15 (11), p.472-474

1994

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Identification of perimeter depletion and emitter plug effects in deep-submicrometer, shallow-junction polysilicon emitter bipolar transistors

IEEE transactions on electron devices, 1992-06, Vol.39 (6), p.1477-1489

1992

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73-GHz self-aligned SiGe-base bipolar transistors with phosphorus-doped polysilicon emitters

IEEE electron device letters, 1992-05, Vol.13 (5), p.259-261

1992

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Implementation of RF power MOS in 0.18/spl mu/m CMOS technology for single chip solution

2002 IEEE MTT-S International Microwave Symposium Digest (Cat. No.02CH37278), 2002, Vol.2, p.1027-1030 vol.2

2002

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Advanced CMOS technology portfolio for RF IC applications

CMOS technology for MS/RF SoC

Characteristics of SOI FET's under pulsed conditions

Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era

Hot carrier reliability improvement by utilizing phosphorus transient enhanced diffusion for input/output devices of deep submicron CMOS technology

Arsenic/phosphorus LDD optimization by taking advantage of phosphorus transient enhanced diffusion for high voltage input/output CMOS devices

A floating well method for exact capacitance-voltage measurement of nano technology

A high-performance 0.25- mu m CMOS technology. II. Technology

Submicrometer-channel CMOS for low-temperature operation

High-performance devices for a 0.15- mu m CMOS technology

Si/SiGe epitaxial-base transistors. I. Materials, physics, and circuits

On the accuracy of channel length characterization of LDD MOSFET's

On the profile design and optimization of epitaxial Si- and SiGe-base bipolar technology for 77 K applications. II. Circuit performance issues

On the profile design and optimization of epitaxial Si- and SiGe-base bipolar technology for 77 K applications. I. Transistor DC design considerations

Geometry effects in MOSFET channel length extraction algorithms

Integrated power transistor in 0.18-[mu]m CMOS technology for RF system-on-chip applications

Integrated power transistor in 0.18-/spl mu/m CMOS technology for RF system-on-chip applications

Integrated power transistor in 0.18-μm CMOS technology for RF system-on-chip applications

Measurement of I-V curves of silicon-on-insulator (SOI) MOSFET's without self-heating

On the transient operation of partially depleted SOI NMOSFET's

History dependence of output characteristics of silicon-on-insulator (SOI) MOSFETs

An epitaxial emitter-cap SiGe-base bipolar technology optimized for liquid-nitrogen temperature operation

Identification of perimeter depletion and emitter plug effects in deep-submicrometer, shallow-junction polysilicon emitter bipolar transistors

73-GHz self-aligned SiGe-base bipolar transistors with phosphorus-doped polysilicon emitters

Implementation of RF power MOS in 0.18/spl mu/m CMOS technology for single chip solution

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