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A 271.8 nm deep-ultraviolet laser diode for room temperature operation

Applied physics express, 2019-11, Vol.12 (12), p.124003

2019

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Space charge profile study of AlGaN-based p-type distributed polarization doped claddings without impurity doping for UV-C laser diodes

Applied physics letters, 2020-10, Vol.117 (15)

2020

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On-wafer fabrication of etched-mirror UV-C laser diodes with the ALD-deposited DBR

Applied physics letters, 2020-03, Vol.116 (12)

2020

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Design and characterization of a low-optical-loss UV-C laser diode

Japanese Journal of Applied Physics, 2020-09, Vol.59 (9), p.94001

2020

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Enhanced light output power of green LEDs employing AlGaN interlayer in InGaN/GaN MQW structure on sapphire (0001) substrate

Physica status solidi. A, Applications and materials science, 2012-03, Vol.209 (3), p.473-476

2012

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Carrier-Transport-Enhanced Channel CMOS for Improved Power Consumption and Performance

IEEE transactions on electron devices, 2008-01, Vol.55 (1), p.21-39

2008

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Characterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation technique

Applied physics letters, 2003-10, Vol.83 (17), p.3516-3518

2003

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Defect analysis in GaN films of HEMT structure by cross-sectional cathodoluminescence

Journal of applied physics, 2017-06, Vol.121 (23)

2017

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Effects of plasma shield plate design on epitaxial GaN films grown for large-sized wafers in radical-enhanced metalorganic chemical vapor deposition

Journal of vacuum science and technology. B, Nanotechnology & microelectronics, 2019-05, Vol.37 (3)

2019

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Modulation of NiGe∕Ge Schottky barrier height by sulfur segregation during Ni germanidation

Applied physics letters, 2006-04, Vol.88 (15)

2006

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Effects of Si passivation on Ge metal-insulator-semiconductor interface properties and inversion-layer hole mobility

Applied physics letters, 2008-03, Vol.92 (11), p.113511-113511-3

2008

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Device Design and Electron Transport Properties of Uniaxially Strained-SOI Tri-Gate nMOSFETs

IEEE transactions on electron devices, 2008-02, Vol.55 (2), p.649-654

2008

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Importance of minority carrier response in accurate characterization of Ge metal-insulator-semiconductor interface traps

Journal of applied physics, 2009-08, Vol.106 (4), p.044506-044506-9

2009

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Deformation Induced Holes in Ge-Rich SiGe-on-Insulator and Ge-on-Insulator Substrates Fabricated by Ge Condensation Process

Applied physics express, 2008-10, Vol.1, p.101401

2008

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Strain analysis in ultrathin SiGe-on-insulator layers formed from strained Si-on-insulator substrates by Ge-condensation process

Applied physics letters, 2007-04, Vol.90 (18), p.181918-181918-3

2007

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Impact of InGaN growth conditions on structural stability under high temperature process in InGaN/GaN multiple quantum wells

Physica status solidi. C, 2011-07, Vol.8 (7-8), p.2016-2018

2011

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Double Junction Tunnel using Si Nanocrystalline Layer for Nonvolatile Memory Devices

Japanese Journal of Applied Physics, 2011-04, Vol.50 (4), p.041302-041302-6

2011

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Dislocation-free relaxed SiGe-on-insulator mesa structures fabricated by high-temperature oxidation

Journal of applied physics, 2003-12, Vol.94 (12), p.7553-7559

2003

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Double Junction Tunnel Using Si Nanocrystalline Layer for Nonvolatile Memory Devices

Japanese Journal of Applied Physics, 2011-04, Vol.50 (4R), p.41302

2011

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Single Source Heterojunction Metal--Oxide--Semiconductor Transistors for Quasi-Ballistic Devices: Optimization of Source Heterostructures and Electron Velocity Characteristics at Low Temperature

Japanese Journal of Applied Physics, 2011-01, Vol.50 (1), p.010107-010107-8

2011

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Planar defect formation mechanism in Ge-rich SiGe-on-insulator substrates during Ge condensation process

Thin solid films, 2008-11, Vol.517 (1), p.407-411

2008

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Lattice relaxation and dislocation generation/annihilation in SiGe-on-insulator layers during Ge condensation process

Thin solid films, 2006-06, Vol.508 (1), p.251-255

2006

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Study of the surface cleaning of GOI and SGOI substrates for Ge epitaxial growth

Applied surface science, 2009-11, Vol.256 (3), p.823-829

2009

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Ion-Implanted Impurity Profiles in Ge Substrates and Amorphous Layer Thickness Formed by Ion Implantation

IEEE transactions on electron devices, 2009-04, Vol.56 (4), p.627-633

2009

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Effects of ambient conditions in thermal treatment for Ge(0 0 1) surfaces on Ge–MIS interface properties

Semiconductor science and technology, 2007-01, Vol.22 (1), p.S114-S117

2007

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A 271.8 nm deep-ultraviolet laser diode for room temperature operation

Space charge profile study of AlGaN-based p-type distributed polarization doped claddings without impurity doping for UV-C laser diodes

On-wafer fabrication of etched-mirror UV-C laser diodes with the ALD-deposited DBR

Design and characterization of a low-optical-loss UV-C laser diode

Enhanced light output power of green LEDs employing AlGaN interlayer in InGaN/GaN MQW structure on sapphire (0001) substrate

Carrier-Transport-Enhanced Channel CMOS for Improved Power Consumption and Performance

Characterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation technique

Defect analysis in GaN films of HEMT structure by cross-sectional cathodoluminescence

Effects of plasma shield plate design on epitaxial GaN films grown for large-sized wafers in radical-enhanced metalorganic chemical vapor deposition

Modulation of NiGe∕Ge Schottky barrier height by sulfur segregation during Ni germanidation

Effects of Si passivation on Ge metal-insulator-semiconductor interface properties and inversion-layer hole mobility

Device Design and Electron Transport Properties of Uniaxially Strained-SOI Tri-Gate nMOSFETs

Importance of minority carrier response in accurate characterization of Ge metal-insulator-semiconductor interface traps

Deformation Induced Holes in Ge-Rich SiGe-on-Insulator and Ge-on-Insulator Substrates Fabricated by Ge Condensation Process

Strain analysis in ultrathin SiGe-on-insulator layers formed from strained Si-on-insulator substrates by Ge-condensation process

Impact of InGaN growth conditions on structural stability under high temperature process in InGaN/GaN multiple quantum wells

Double Junction Tunnel using Si Nanocrystalline Layer for Nonvolatile Memory Devices

Dislocation-free relaxed SiGe-on-insulator mesa structures fabricated by high-temperature oxidation

Double Junction Tunnel Using Si Nanocrystalline Layer for Nonvolatile Memory Devices

Single Source Heterojunction Metal--Oxide--Semiconductor Transistors for Quasi-Ballistic Devices: Optimization of Source Heterostructures and Electron Velocity Characteristics at Low Temperature

Planar defect formation mechanism in Ge-rich SiGe-on-insulator substrates during Ge condensation process

Lattice relaxation and dislocation generation/annihilation in SiGe-on-insulator layers during Ge condensation process

Study of the surface cleaning of GOI and SGOI substrates for Ge epitaxial growth

Ion-Implanted Impurity Profiles in Ge Substrates and Amorphous Layer Thickness Formed by Ion Implantation

Effects of ambient conditions in thermal treatment for Ge(0 0 1) surfaces on Ge–MIS interface properties

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