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A sub-1-volt nanoelectromechanical switching device

Nature nanotechnology, 2013, Vol.8 (1), p.36-40

2013

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Vacuum nanoelectronics: Back to the future?-Gate insulated nanoscale vacuum channel transistor

Applied physics letters, 2012-05, Vol.100 (21), p.213505-213505-4

2012

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Low-Frequency Noise Characteristics in SONOS Flash Memory With Vertically Stacked Nanowire FETs

IEEE electron device letters, 2017-01, Vol.38 (1), p.40-43

2017

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Vacuum gate dielectric gate-all-around nanowire for hot carrier injection and bias temperature instability free transistor

Applied physics letters, 2014-06, Vol.104 (25)

2014

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Downscaling Study of Uncooled a-Si Infrared Microbolometer Cell based on Simulation

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2020, 20(1), 91, pp.47-54

2020

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A Novel FinFET With High-Speed and Prolonged Retention for Dynamic Memory

IEEE electron device letters, 2014-12, Vol.35 (12), p.1236-1238

2014

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Silicon Nanowire All-Around Gate MOSFETs Built on a Bulk Substrate by All Plasma-Etching Routes

IEEE electron device letters, 2011-04, Vol.32 (4), p.452-454

2011

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Vertically Integrated Unidirectional Biristor

IEEE electron device letters, 2011-11, Vol.32 (11), p.1483-1485

2011

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Cofabrication of Vacuum Field Emission Transistor (VFET) and MOSFET

IEEE transactions on nanotechnology, 2014-05, Vol.13 (3), p.464-468

2014

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A SONOS device with a separated charge trapping layer for improvement of charge injection

AIP advances, 2017-03, Vol.7 (3), p.035205-035205-7

2017

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Refinement of Unified Random Access Memory

IEEE transactions on electron devices, 2009-04, Vol.56 (4), p.601-608

2009

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Enhancement of Program Speed in Dopant-Segregated Schottky-Barrier (DSSB) FinFET SONOS for NAND-Type Flash Memory

IEEE electron device letters, 2009-01, Vol.30 (1), p.78-81

2009

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300 mm Large Area Wire Grid Polarizers with 50 nm Half-Pitch by ArF Immersion Lithography

Nanomaterials (Basel, Switzerland), 2022-01, Vol.12 (3), p.481

2022

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Improvement of memory performance by high temperature annealing of the Al2O3 blocking layer in a charge-trap type flash memory device

Applied physics letters, 2010-05, Vol.96 (22)

2010

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Multiple-Gate CMOS Thin-Film Transistor With Polysilicon Nanowire

IEEE electron device letters, 2008-01, Vol.29 (1), p.102-105

2008

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Tunneling oxide engineering by ion implantation of nitrogen for 3D vertical silicon pillar SONOS flash memory

Microelectronic engineering, 2013-03, Vol.103, p.33-35

2013

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3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

Solid-state electronics, 2013-08, Vol.86, p.6-10

2013

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A Bulk FinFET Unified-RAM (URAM) Cell for Multifunctioning NVM and Capacitorless 1T-DRAM

IEEE electron device letters, 2008-06, Vol.29 (6), p.632-634

2008

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Lanthanum-Oxide-Doped Nitride Charge-Trap Layer for a TANOS Memory Device

IEEE transactions on electron devices, 2011-10, Vol.58 (10), p.3314-3320

2011

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A sub-1-volt nanoelectromechanical switching device

Nature nanotechnology, 2013-01, Vol.8 (1), p.36-40

2013

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Comparative Analysis of Bandgap-Engineered Pillar Type Flash Memory with HfO2 and S3N4 as Trapping Layer

IEICE transactions on electronics, 2012, Vol.E95.C (5), p.831-836

2012

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Partially Depleted SONOS FinFET for Unified RAM (URAM)-Unified Function for High-Speed 1T DRAM and Nonvolatile Memory

IEEE electron device letters, 2008-07, Vol.29 (7), p.781-783

2008

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Improved hydrogen gas sensing performance of Pd–Ni alloy thin films

International journal of hydrogen energy, 2023-04, Vol.48 (33), p.12534-12539

2023

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High Injection Efficiency and Low-Voltage Programming in a Dopant-Segregated Schottky Barrier (DSSB) FinFET SONOS for nor-type Flash Memory

IEEE electron device letters, 2009-03, Vol.30 (3), p.265-268

2009

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A sub-1-volt nanoelectromechanical switching device

Vacuum nanoelectronics: Back to the future?-Gate insulated nanoscale vacuum channel transistor

Low-Frequency Noise Characteristics in SONOS Flash Memory With Vertically Stacked Nanowire FETs

Vacuum gate dielectric gate-all-around nanowire for hot carrier injection and bias temperature instability free transistor

Downscaling Study of Uncooled a-Si Infrared Microbolometer Cell based on Simulation

A Novel FinFET With High-Speed and Prolonged Retention for Dynamic Memory

Silicon Nanowire All-Around Gate MOSFETs Built on a Bulk Substrate by All Plasma-Etching Routes

Vertically Integrated Unidirectional Biristor

Cofabrication of Vacuum Field Emission Transistor (VFET) and MOSFET

A SONOS device with a separated charge trapping layer for improvement of charge injection

Refinement of Unified Random Access Memory

Enhancement of Program Speed in Dopant-Segregated Schottky-Barrier (DSSB) FinFET SONOS for NAND-Type Flash Memory

Energy-Band-Engineered Unified-RAM (URAM) Cell on Buried [Formula Omitted] Substrate for Multifunctioning Flash Memory and 1T-DRAM

300 mm Large Area Wire Grid Polarizers with 50 nm Half-Pitch by ArF Immersion Lithography

Improvement of memory performance by high temperature annealing of the Al2O3 blocking layer in a charge-trap type flash memory device

Multiple-Gate CMOS Thin-Film Transistor With Polysilicon Nanowire

Tunneling oxide engineering by ion implantation of nitrogen for 3D vertical silicon pillar SONOS flash memory

3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

A Bulk FinFET Unified-RAM (URAM) Cell for Multifunctioning NVM and Capacitorless 1T-DRAM

Lanthanum-Oxide-Doped Nitride Charge-Trap Layer for a TANOS Memory Device

A sub-1-volt nanoelectromechanical switching device

Comparative Analysis of Bandgap-Engineered Pillar Type Flash Memory with HfO2 and S3N4 as Trapping Layer

Partially Depleted SONOS FinFET for Unified RAM (URAM)-Unified Function for High-Speed 1T DRAM and Nonvolatile Memory

Improved hydrogen gas sensing performance of Pd–Ni alloy thin films

High Injection Efficiency and Low-Voltage Programming in a Dopant-Segregated Schottky Barrier (DSSB) FinFET SONOS for nor-type Flash Memory

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