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How 2D semiconductors could extend Moore's law

Nature (London), 2019-03, Vol.567 (7747), p.169-170

2019

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Layered Semiconducting 2D Materials for Future Transistor Applications

Small structures, 2021-05, Vol.2 (5), p.n/a

2021

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Bandgap Extraction at 10 K to Enable Leakage Control in Carbon Nanotube MOSFETs

IEEE electron device letters, 2022-03, Vol.43 (3), p.490-493

2022

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IEEE_Xplore

Impact of Metal Hybridization on Contact Resistance and Leakage Current of Carbon Nanotube Transistors

IEEE electron device letters, 2022-08, Vol.43 (8), p.1367-1370

2022

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IEEE_Xplore

Small Molecule Additives to Suppress Bundling in Dimensional‐Limited Self‐Alignment Method for High‐Density Aligned Carbon Nanotube Array

Advanced materials interfaces, 2024-02, Vol.11 (6), p.n/a

2024

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Self‐Aligned Contact Doping for Performance Enhancement of Low‐Leakage Carbon Nanotube Field Effect Transistors

Advanced electronic materials, 2024-03, Vol.10 (3), p.n/a

2024

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Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS2 Channel Directly Grown on SiO } /Si Substrates Using Area-Selective CVD Technology

IEEE transactions on electron devices, 2019-12, Vol.66 (12), p.5381-5386

2019

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IEEE_Xplore

Band-to-Band Tunneling Leakage Current Characterization and Projection in Carbon Nanotube Transistors

ACS nano, 2023-11, Vol.17 (21), p.21083-21092

2023

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High-Performance Two-Dimensional Electronics with a Noncontact Remote Doping Method

ACS nano, 2023-07, Vol.17 (13), p.12208-12215

2023

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Comprehensive Study of Contact Length Scaling Down to 12 nm With Monolayer MoS2 Channel Transistors

IEEE transactions on electron devices, 2023-12, Vol.70 (12), p.6680-6686

2023

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IEEE_Xplore

A Simulation Perspective: The Potential and Limitation of Ge GAA CMOS Devices

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 2018, p.323-326

2018

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IEEE_Xplore

Effect of Metal Coupling on Schottky Barrier Height Extraction

2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 2023, p.109-112

2023

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Perspective on Low-dimensional Channel Materials for Extremely Scaled CMOS

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.403-404

2022

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IEEE_Xplore

Impact of Schottky Barrier on the Performance of Two-Dimensional Material Transistors

2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 2020, p.285-287

2020

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IEEE_Xplore

Building high performance transistors on carbon nanotube channel

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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IEEE_Xplore

First demonstration of 40-nm channel length top-gate WS2 pFET using channel area-selective CVD growth directly on SiOx/Si substrate

2019 Symposium on VLSI Technology, 2019, p.T244-T245

2019

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IEEE_Xplore

Scaled contact length with low contact resistance in monolayer 2D channel transistors

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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IEEE_Xplore

Well-thickness dependent electron transport effective mass and mobility in Sb-based quantum wells

Physica. E, Low-dimensional systems & nanostructures, 2013-02, Vol.48, p.80-84

2013

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High-density ordered triangular Si nanopillars with sharp tips and varied slopes: one-step fabrication and excellent field emission properties

Nanotechnology, 2007-12, Vol.18 (50), p.505305-505305 (5)

2007

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Barrier Booster for Remote Extension Doping and its DTCO for 1D & 2D FETs

2023 International Electron Devices Meeting (IEDM), 2023, p.1-4

2023

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IEEE_Xplore

pMOSFET with CVD-grown 2D semiconductor channel enabled by ultra-thin and fab-compatible spacer doping

2022 International Electron Devices Meeting (IEDM), 2022, p.7.3.1-7.3.4

2022

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IEEE_Xplore

Low N-Type Contact Resistance to Carbon Nanotubes in Highly Scaled Contacts through Dielectric Doping

2023 International Electron Devices Meeting (IEDM), 2023, p.1-4

2023

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IEEE_Xplore

High-performance monolayer MoS 2 nanosheet GAA transistor

Nanotechnology, 2024-03, Vol.35 (12), p.125204

2024

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Comprehensive Study of Contact Length Scaling Down to 12 nm With Monolayer MoS 2 Channel Transistors

IEEE transactions on electron devices, 2023-12, Vol.70 (12), p.6680-6686

2023

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Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS 2 Channel Directly Grown on SiO$_{{x}}$ /Si Substrates Using Area-Selective CVD Technology

IEEE transactions on electron devices, 2019-12, Vol.66 (12), p.5381-5386

2019

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How 2D semiconductors could extend Moore's law

Layered Semiconducting 2D Materials for Future Transistor Applications

Bandgap Extraction at 10 K to Enable Leakage Control in Carbon Nanotube MOSFETs

Impact of Metal Hybridization on Contact Resistance and Leakage Current of Carbon Nanotube Transistors

Small Molecule Additives to Suppress Bundling in Dimensional‐Limited Self‐Alignment Method for High‐Density Aligned Carbon Nanotube Array

Self‐Aligned Contact Doping for Performance Enhancement of Low‐Leakage Carbon Nanotube Field Effect Transistors

Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS2 Channel Directly Grown on SiO } /Si Substrates Using Area-Selective CVD Technology

Band-to-Band Tunneling Leakage Current Characterization and Projection in Carbon Nanotube Transistors

High-Performance Two-Dimensional Electronics with a Noncontact Remote Doping Method

Comprehensive Study of Contact Length Scaling Down to 12 nm With Monolayer MoS2 Channel Transistors

A Simulation Perspective: The Potential and Limitation of Ge GAA CMOS Devices

Effect of Metal Coupling on Schottky Barrier Height Extraction

Perspective on Low-dimensional Channel Materials for Extremely Scaled CMOS

Impact of Schottky Barrier on the Performance of Two-Dimensional Material Transistors

Building high performance transistors on carbon nanotube channel

First demonstration of 40-nm channel length top-gate WS2 pFET using channel area-selective CVD growth directly on SiOx/Si substrate

Scaled contact length with low contact resistance in monolayer 2D channel transistors

Well-thickness dependent electron transport effective mass and mobility in Sb-based quantum wells

High-density ordered triangular Si nanopillars with sharp tips and varied slopes: one-step fabrication and excellent field emission properties

Barrier Booster for Remote Extension Doping and its DTCO for 1D & 2D FETs

pMOSFET with CVD-grown 2D semiconductor channel enabled by ultra-thin and fab-compatible spacer doping

Low N-Type Contact Resistance to Carbon Nanotubes in Highly Scaled Contacts through Dielectric Doping

High-performance monolayer MoS 2 nanosheet GAA transistor

Comprehensive Study of Contact Length Scaling Down to 12 nm With Monolayer MoS 2 Channel Transistors

Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS 2 Channel Directly Grown on SiO$_{{x}}$ /Si Substrates Using Area-Selective CVD Technology

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