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Efficient high-power UV laser generated by an optimized flat–flat actively Q-switched laser with extra-cavity harmonic generations

Optics communications, 2012, Vol.285 (1), p.59-63

2012

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Power scale-up of the diode-pumped actively Q-switched Nd:YVO4 Raman laser with an undoped YVO4 crystal as a Raman shifter

Applied physics. B, Lasers and optics, 2007-06, Vol.88 (1), p.47-50

2007

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High-peak-power passively Q-switched Nd:YAG laser at 946 nm

Applied physics. B, Lasers and optics, 2008-06, Vol.91 (3-4), p.429-432

2008

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A Multi-Stage Method for Deterministic-Statistical Analysis: A Weibo Case and Measurement Studies

Applied Mechanics and Materials, 2014-02, Vol.519-520 (Computer and Information Technology), p.1193-1196

2014

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An Enhanced AC Conductance Method with Source/Drain Resistance Correction for Self-Heating Effects of Novel Nano-Scaled Devices

2023 Silicon Nanoelectronics Workshop (SNW), 2023, p.89-90

2023

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Routing Protocol Performance Evaluation in Wireless Ad hoc Network

Information Technology Journal, 2013, Vol.12 (22), p.6595-6599

2013

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Partitioned gate tunnelling current model considering distributed effect for CMOS devices with ultra-thin (1nm) gate oxide

Electronics letters, 2006-02, Vol.42 (3), p.182-184

2006

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InGaAsP quantum-wells saturable absorber for diode-pumped passively Q-switched 1.3-μm lasers

Applied physics. B, Lasers and optics, 2006-09, Vol.84 (3), p.429-431

2006

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Compact current model for mesa-isolated fully-depleted ultrathin SOI NMOS devices considering sidewall-related narrow channel effects

1997 IEEE International SOI Conference Proceedings, 1997, p.84-85

1997

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Analytical capacitance model for submicron accumulation-mode SOI MOS devices

Solid-state electronics, 1998-04, Vol.42 (4), p.513-522

1998

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Modeling narrow-channel effect in VLSI mesa-isolated SOI MOS devices using a quasi-two-dimensional approach

Solid State Electronics, 1996-09, Vol.39 (9), p.1321-1329

1996

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Quantum signatures of nonlinear resonances in mesoscopic systems: efficient extension of localized wave functions

Physical review. E, Statistical physics, plasmas, fluids, and related interdisciplinary topics, 2005-11, Vol.72 (5 Pt 2), p.056210-056210, Article 056210

2005

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1.5 V BiCMOS dynamic multiplier using Wallace tree reduction architecture

Electronics letters, 1993-11, Vol.29 (24), p.2097-2098

1993

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Analysis of Capacitance Behavior for Short-Channel Accumulation-Mode SOI PMOS Devices

27th European Solid-State Device Research Conference, 1997, p.672-675

1997

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Sidewall-related narrow channel effect in mesa-isolated fully-depleted ultra-thin SOI NMOS devices

IEEE electron device letters, 1995-09, Vol.16 (9), p.379-381

1995

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A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5-V full-swing BiCMOS dynamic logic circuit

IEEE journal of solid-state circuits, 1995-08, Vol.30 (8), p.950-954

1995

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A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology

IEEE journal of solid-state circuits, 1995-01, Vol.30 (1), p.73-75

1995

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An analytical delayed-turn-off model for 6H-SiC buried-channel NMOS devices considering incomplete ionization

Proceedings of 4th International Conference on Solid-State and IC Technology, 1995, p.592-594

1995

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Short-channel effect on the threshold voltage of accumulation-type, inversion-type and intrinsic-type SOI PMOS devices

Solid-state electronics, 1995-10, Vol.38 (10), p.1845-1847

1995

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BiCMOS dynamic minimum circuit using a parallel comparison algorithm for fuzzy controllers

Electronics letters, 1993-03, Vol.29 (6), p.551-553

1993

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Compact MOS/Bipolar Charge-Control Models of Partially-Depleted SOI CMOS Devices for VLSI Circuit Simulation - SOI-Technology (ST)-SPICE

29th European Solid-State Device Research Conference, 1999, Vol.1, p.480-483

1999

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A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5 V full-swing BiCMOS dynamic logic circuit

1994 IEEE International Symposium on Circuits and Systems (ISCAS), 1994, Vol.4, p.323-326 vol.4

1994

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Accumulation-type vs. inversion-type: narrow channel effect in VLSI mesa-isolated fully-depleted ultra-thin SOI PMOS devices

1995 IEEE International SOI Conference Proceedings, 1995, p.38-39

1995

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Analytical current conduction model for accumulation-mode SOI PMOS devices

1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095), 1996, p.113-114

1996

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A 1.5 V 10 MHz BiCMOS quasi-digital vector modulator for wireless communication IC

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems, 1994, p.218-219

1994

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Efficient high-power UV laser generated by an optimized flat–flat actively Q-switched laser with extra-cavity harmonic generations

Power scale-up of the diode-pumped actively Q-switched Nd:YVO4 Raman laser with an undoped YVO4 crystal as a Raman shifter

High-peak-power passively Q-switched Nd:YAG laser at 946 nm

A Multi-Stage Method for Deterministic-Statistical Analysis: A Weibo Case and Measurement Studies

An Enhanced AC Conductance Method with Source/Drain Resistance Correction for Self-Heating Effects of Novel Nano-Scaled Devices

Routing Protocol Performance Evaluation in Wireless Ad hoc Network

Partitioned gate tunnelling current model considering distributed effect for CMOS devices with ultra-thin (1nm) gate oxide

InGaAsP quantum-wells saturable absorber for diode-pumped passively Q-switched 1.3-μm lasers

Compact current model for mesa-isolated fully-depleted ultrathin SOI NMOS devices considering sidewall-related narrow channel effects

Analytical capacitance model for submicron accumulation-mode SOI MOS devices

Modeling narrow-channel effect in VLSI mesa-isolated SOI MOS devices using a quasi-two-dimensional approach

Quantum signatures of nonlinear resonances in mesoscopic systems: efficient extension of localized wave functions

1.5 V BiCMOS dynamic multiplier using Wallace tree reduction architecture

Analysis of Capacitance Behavior for Short-Channel Accumulation-Mode SOI PMOS Devices

Sidewall-related narrow channel effect in mesa-isolated fully-depleted ultra-thin SOI NMOS devices

A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5-V full-swing BiCMOS dynamic logic circuit

A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology

An analytical delayed-turn-off model for 6H-SiC buried-channel NMOS devices considering incomplete ionization

Short-channel effect on the threshold voltage of accumulation-type, inversion-type and intrinsic-type SOI PMOS devices

BiCMOS dynamic minimum circuit using a parallel comparison algorithm for fuzzy controllers

Compact MOS/Bipolar Charge-Control Models of Partially-Depleted SOI CMOS Devices for VLSI Circuit Simulation - SOI-Technology (ST)-SPICE

A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5 V full-swing BiCMOS dynamic logic circuit

Accumulation-type vs. inversion-type: narrow channel effect in VLSI mesa-isolated fully-depleted ultra-thin SOI PMOS devices

Analytical current conduction model for accumulation-mode SOI PMOS devices

A 1.5 V 10 MHz BiCMOS quasi-digital vector modulator for wireless communication IC

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