UB Paderborn / Katalog / Suche / in CDI

HotSpot: a compact thermal modeling methodology for early-stage VLSI design

IEEE transactions on very large scale integration (VLSI) systems, 2006-05, Vol.14 (5), p.501-513

2006

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Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model

IEEE transactions on computers, 2008-09, Vol.57 (9), p.1277-1288

2008

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A Programmable Majority Logic Array Using Molecular Scale Electronics

IEEE transactions on circuits and systems. I, Regular papers, 2007-11, Vol.54 (11), p.2380-2390

2007

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Interconnect Lifetime Prediction for Reliability-Aware Systems

IEEE transactions on very large scale integration (VLSI) systems, 2007-02, Vol.15 (2), p.159-172

2007

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Parameterized physical compact thermal modeling

IEEE transactions on components and packaging technologies, 2005-12, Vol.28 (4), p.615-622

2005

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Low-power CMOS with subvolt supply voltages

IEEE transactions on very large scale integration (VLSI) systems, 2001-04, Vol.9 (2), p.394-400

Stan, M.R.

2001

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Conformational Molecular Switches for Post-CMOS Nanoelectronics

IEEE transactions on circuits and systems. I, Regular papers, 2007-11, Vol.54 (11), p.2345-2352

2007

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Large-signal two-terminal device model for nanoelectronic circuit analysis

IEEE transactions on very large scale integration (VLSI) systems, 2004-11, Vol.12 (11), p.1201-1208

2004

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Split-path skewed (SPS) CMOS buffer for high performance and low power applications

IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 2001-10, Vol.48 (10), p.998-1002

2001

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Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management

Proceedings Eighth International Symposium on High Performance Computer Architecture, 2002, p.17-28

2002

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Bus-invert coding for low-power I/O

IEEE transactions on very large scale integration (VLSI) systems, 1995-03, Vol.3 (1), p.49-58

1995

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Power-aware computing

Computer (Long Beach, Calif.), 2003-12, Vol.36 (12), p.35-38

2003

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Compact thermal modeling for temperature-aware design

Proceedings of the 41st annual Design Automation Conference, 2004, p.878-883

2004

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Temperature-aware computer systems: Opportunities and challenges

IEEE MICRO, 2003-11, Vol.23 (6), p.52-61

2003

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Improved thermal management with reliability banking

IEEE MICRO, 2005-11, Vol.25 (6), p.40-49

2005

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Low-power encodings for global communication in CMOS VLSI

IEEE transactions on very large scale integration (VLSI) systems, 1997-12, Vol.5 (4), p.444-455

1997

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Using Intradisk Parallelism to Build Energy-Efficient Storage Systems

IEEE MICRO, 2009-01, Vol.29 (1), p.50-61

2009

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Sensitivity-Based Optimization of Disk Architecture

IEEE transactions on computers, 2009-01, Vol.58 (1), p.69-81

2009

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Intra-disk Parallelism: An Idea Whose Time Has Come

2008 International Symposium on Computer Architecture, 2008, p.303-314

2008

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The need for a full-chip and package thermal model for thermally optimized IC designs

ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, 2005, p.245-250

2005

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Graphene devices, interconnect and circuits - challenges and opportunities

2009 IEEE International Symposium on Circuits and Systems (ISCAS), 2009, p.69-72

2009

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System level leakage reduction considering the interdependence of temperature and leakage

Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004, 2004, p.12-17

2004

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Power issues related to branch prediction

Proceedings Eighth International Symposium on High Performance Computer Architecture, 2002, p.233-244

2002

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Atomistic deconstruction of clear performance advantages of a monolithically patterned wide-narrow-wide all-graphene FET

2009 Device Research Conference, 2009, p.75-76

2009

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Sensitivity Based Power Management of Enterprise Storage Systems

2008 IEEE International Symposium on Modeling, Analysis and Simulation of Computers and Telecommunication Systems, 2008, p.1-10

2008

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HotSpot: a compact thermal modeling methodology for early-stage VLSI design

Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model

A Programmable Majority Logic Array Using Molecular Scale Electronics

Interconnect Lifetime Prediction for Reliability-Aware Systems

Parameterized physical compact thermal modeling

Low-power CMOS with subvolt supply voltages

Conformational Molecular Switches for Post-CMOS Nanoelectronics

Large-signal two-terminal device model for nanoelectronic circuit analysis

Split-path skewed (SPS) CMOS buffer for high performance and low power applications

Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management

Bus-invert coding for low-power I/O

Power-aware computing

Compact thermal modeling for temperature-aware design

Temperature-aware computer systems: Opportunities and challenges

Improved thermal management with reliability banking

Low-power encodings for global communication in CMOS VLSI

Using Intradisk Parallelism to Build Energy-Efficient Storage Systems

Sensitivity-Based Optimization of Disk Architecture

Intra-disk Parallelism: An Idea Whose Time Has Come

The need for a full-chip and package thermal model for thermally optimized IC designs

Graphene devices, interconnect and circuits - challenges and opportunities

System level leakage reduction considering the interdependence of temperature and leakage

Power issues related to branch prediction

Atomistic deconstruction of clear performance advantages of a monolithically patterned wide-narrow-wide all-graphene FET

Sensitivity Based Power Management of Enterprise Storage Systems

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