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Compact and Broadband ESD Protection I/O Pad Using Pad-Stacked Inductor

IEEE access, 2023, Vol.11, p.11422-11429

2023

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A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization

IEEE transactions on circuits and systems. I, Regular papers, 2016-02, Vol.63 (2), p.276-287

2016

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Bandwidth Extension of CMOS Amplifier Using Mutually Coupled Three-Inductor Coil

IEEE transactions on circuits and systems. II, Express briefs, 2024-09, Vol.71 (9), p.4066-4070

2024

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A new charge pump without degradation in threshold voltage due to body effect [memory applications]

IEEE journal of solid-state circuits, 2000-08, Vol.35 (8), p.1227-1230

2000

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A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS

IEEE journal of solid-state circuits, 2020-10, Vol.55 (10), p.2831-2841

2020

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A 95.4% Hybrid Always-Dual-Path Recursive Step-Down Converter Using Adaptive Switching Level Control with 288mΩ Large-DCR Inductor

IEEE transactions on power electronics, 2023-11, p.1-12

2023

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A 95.4% Hybrid Always-Dual-Path Recursive Step-Down Converter Using Adaptive Switching Level Control With 288 mΩ Large-DCR Inductor

IEEE transactions on power electronics, 2024-02, Vol.39 (2), p.2258-2269

2024

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A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection

IEEE journal of solid-state circuits, 2024-01, Vol.59 (1), p.1-12

2024

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Dual-Path Three-Level Buck Converter With Loop-Free Autocalibration for Flying Capacitor Self-Balancing

IEEE transactions on power electronics, 2021-01, Vol.36 (1), p.51-55

2021

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A High-Efficiency High-Voltage-Tolerant Buck Converter with Inductor Current Emulator for Battery-Powered IoT Devices

IEEE transactions on power electronics, 2023-09, Vol.38 (9), p.1-16

2023

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3.9 A 1.2V High-Voltage-Tolerant Bootstrapped Analog Sampler in 12-bit SAR ADC Using 3nm GAA's 0.7V Thin-Gate-Oxide Transistor

2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.70-72

2024

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An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss

IEEE transactions on circuits and systems. II, Express briefs, 2020-12, Vol.67 (12), p.2863-2867

2020

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A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links

IEEE journal of solid-state circuits, 2023-04, Vol.58 (4), p.1074-1086

2023

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A PVT-Tolerant STR-Based TRNG in 4-nm Achieving 60 Mbp/s and Its Performance Analysis via Mathematical Modeling

IEEE solid-state circuits letters, 2024, Vol.7, p.255-258

2024

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A 12-bit 16GS/s Single-Channel RF-DAC with Hybrid Segmentation for Digital Back-Off and Code-Dependent Free Switch Driver Achieving −85dBc IMD3 in 5nm FinFET

2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2024, p.1-2

2024

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A 12-bit 10GS/s Time-Interleaved SAR ADC with Even/Odd Channel-Correlated Absolute Error-Based Over-Nyquist Timing-Skew Calibration in 5nm FinFET

2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2024, p.1-2

2024

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16.8 A 60Mb/s TRNG with PVT-Variation-Tolerant Design Based on STR in 4nm

2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.310-312

2024

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A 16GHz 33fs rms Integrated Jitter FLL-less Gear Shifting Reference Sampling PLL

2023 IEEE Custom Integrated Circuits Conference (CICC), 2023, p.1-2

2023

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A 0.65V 1316µm2Fully Synthesizable Digital Temperature Sensor Using Wire Metal Achieving O.16nJ.%2-Accuracy FoM in 5nm FinFET CMOS

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.220-222

2022

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10.5 A 12b 600MS/s Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET

2021 IEEE International Solid- State Circuits Conference (ISSCC), 2021, Vol.64, p.172-174

2021

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A 12-bit 8GS/s RF Sampling DAC with Code-Dependent Nonlinearity Compensation and Intersegmental Current-Mismatch Calibration in 5nm FinFET

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.86-87

2022

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An Automotive ASIL-D Safety Mechanism in ADC and DAC for Communication Application

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.142-143

2022

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Clock Generator with IS026262 ASIL-D Grade Safety Mechanism for SoC Clocking Application

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.210-212

2022

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29.6 A Distributed Digital LDO with Time-Multiplexing Calibration Loop Achieving 40A/mm2 Current Density and 1mA-to-6.4A Ultra-Wide Load Range in 5nm FinFET CMOS

2021 IEEE International Solid- State Circuits Conference (ISSCC), 2021, Vol.64, p.414-416

2021

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Samsung Physically Unclonable Function (SAMPUF™) and its integration with Samsung Security System

2021 IEEE Custom Integrated Circuits Conference (CICC), 2021, p.1-7

2021

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Compact and Broadband ESD Protection I/O Pad Using Pad-Stacked Inductor

A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization

Bandwidth Extension of CMOS Amplifier Using Mutually Coupled Three-Inductor Coil

A new charge pump without degradation in threshold voltage due to body effect [memory applications]

A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS

A 95.4% Hybrid Always-Dual-Path Recursive Step-Down Converter Using Adaptive Switching Level Control with 288mΩ Large-DCR Inductor

A 95.4% Hybrid Always-Dual-Path Recursive Step-Down Converter Using Adaptive Switching Level Control With 288 mΩ Large-DCR Inductor

A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection

Dual-Path Three-Level Buck Converter With Loop-Free Autocalibration for Flying Capacitor Self-Balancing

A High-Efficiency High-Voltage-Tolerant Buck Converter with Inductor Current Emulator for Battery-Powered IoT Devices

3.9 A 1.2V High-Voltage-Tolerant Bootstrapped Analog Sampler in 12-bit SAR ADC Using 3nm GAA's 0.7V Thin-Gate-Oxide Transistor

An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss

A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links

A PVT-Tolerant STR-Based TRNG in 4-nm Achieving 60 Mbp/s and Its Performance Analysis via Mathematical Modeling

A 12-bit 16GS/s Single-Channel RF-DAC with Hybrid Segmentation for Digital Back-Off and Code-Dependent Free Switch Driver Achieving −85dBc IMD3 in 5nm FinFET

A 12-bit 10GS/s Time-Interleaved SAR ADC with Even/Odd Channel-Correlated Absolute Error-Based Over-Nyquist Timing-Skew Calibration in 5nm FinFET

16.8 A 60Mb/s TRNG with PVT-Variation-Tolerant Design Based on STR in 4nm

A 16GHz 33fs rms Integrated Jitter FLL-less Gear Shifting Reference Sampling PLL

A 0.65V 1316µm2Fully Synthesizable Digital Temperature Sensor Using Wire Metal Achieving O.16nJ.%2-Accuracy FoM in 5nm FinFET CMOS

10.5 A 12b 600MS/s Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET

A 12-bit 8GS/s RF Sampling DAC with Code-Dependent Nonlinearity Compensation and Intersegmental Current-Mismatch Calibration in 5nm FinFET

An Automotive ASIL-D Safety Mechanism in ADC and DAC for Communication Application

Clock Generator with IS026262 ASIL-D Grade Safety Mechanism for SoC Clocking Application

29.6 A Distributed Digital LDO with Time-Multiplexing Calibration Loop Achieving 40A/mm2 Current Density and 1mA-to-6.4A Ultra-Wide Load Range in 5nm FinFET CMOS

Samsung Physically Unclonable Function (SAMPUF™) and its integration with Samsung Security System

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