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From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-07, Vol.38 (7), p.1291-1304

2019

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Contrasting forms of competition set elevational range limits of species

Ecology letters, 2019-10, Vol.22 (10), p.1668-1679

2019

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Invited Paper: Unleashing the Potential of Machine Learning: Harnessing the Dynamics of Supply Noise for Timing Sign-Off

2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023, p.1-6

2023

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Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface

IEEE transactions on very large scale integration (VLSI) systems, 2015-09, Vol.23 (9), p.1760-1771

2015

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A Meta-Analysis Comparing the Efficacy and Safety of Peramivir with Other Neuraminidase Inhibitors for Influenza Treatment

Medicina (Kaunas, Lithuania), 2020-02, Vol.56 (2), p.63

2020

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Analytical Modeling of Output Conductance in Long-Channel Halo-Doped MOSFETs

IEEE transactions on electron devices, 2006-09, Vol.53 (9), p.2091-2097

2006

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A novel cross-layer framework for early-stage power delivery and architecture co-exploration

2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 2016, p.1-6

2016

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Bursty jitter in high-speed I/O due to power-state transition and its impact on signal integrity

2016 IEEE International Symposium on Electromagnetic Compatibility (EMC), 2016, p.491-494

2016

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Early-Stage Power Grid Design: Extraction, Modeling and Optimization

2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 2014, p.1-6

2014

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Optimal Time Domain Reflectometry Penetrometer Design for Soil Water Content and Electrical Conductivity Profiling

Geotechnical testing journal, 2023-01, Vol.46 (1), p.20220030

2023

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A silicon-validated methodology for power delivery modeling and simulation

2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2012, p.255-262

2012

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A Cross-Layer Approach for Early-Stage Power Grid Design and Optimization

ACM journal on emerging technologies in computing systems, 2015-09, Vol.12 (3), p.1-20

2015

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Critical thermal issues in nanoscale IC design

2009 IEEE International Reliability Physics Symposium, 2009, p.909-912

2009

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Noise performance of 90 nm CMOS technology

2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535), 2004, Vol.1, p.17-20 Vol.1

2004

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A physically-based model for quantization effects in hole inversion layers

IEEE transactions on electron devices, 1998-01, Vol.45 (1), p.179-186

1998

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Modeling gate leakage current in nMOS structures due to tunneling through an ultra-thin oxide

Solid-state electronics, 1998-06, Vol.42 (6), p.997-1006

1998

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Nonadiabatic particle transport in a one-dimensional electron system

Physical review. B, Condensed matter, 1994-10, Vol.50 (16), p.11902-11910

1994

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Hydrodynamic (HD) simulation of N-channel MOSFET's with a computationally efficient inversion layer quantization model

VLSI design (Yverdon, Switzerland), 1998-01, Vol.8 (1-4), p.423-428

1998

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Study of electron velocity overshoot in nMOS inversion layers

VLSI design (Yverdon, Switzerland), 1998-01, Vol.8 (1-4), p.429-435

1998

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An efficient surface potential solution algorithm for compact MOSFET models

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, 2004, p.755-758

2004

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A three-transistor threshold voltage model for halo processes

Digest. International Electron Devices Meeting, 2002, p.113-116

2002

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Predictive compact modeling of NQS effects and thermal noise in 90nm mixed-signal/RF CMOS technology

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, 2004, p.747-750

2004

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Computationally efficient models for quantization effects in MOS electron and hole accumulation layers

IEEE transactions on electron devices, 1998-07, Vol.45 (7), p.1487-1493

1998

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Session 29: Modeling and simulation variability modeling and technology optimization

2008 IEEE International Electron Devices Meeting, 2008, p.1-1

2008

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Investigation of quantization effects on inversion layer carrier transport in deep submicron silicon MOSFETs

Shih, Wei-Kai

1997

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From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration

Contrasting forms of competition set elevational range limits of species

Invited Paper: Unleashing the Potential of Machine Learning: Harnessing the Dynamics of Supply Noise for Timing Sign-Off

Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface

A Meta-Analysis Comparing the Efficacy and Safety of Peramivir with Other Neuraminidase Inhibitors for Influenza Treatment

Analytical Modeling of Output Conductance in Long-Channel Halo-Doped MOSFETs

A novel cross-layer framework for early-stage power delivery and architecture co-exploration

Bursty jitter in high-speed I/O due to power-state transition and its impact on signal integrity

Early-Stage Power Grid Design: Extraction, Modeling and Optimization

Optimal Time Domain Reflectometry Penetrometer Design for Soil Water Content and Electrical Conductivity Profiling

A silicon-validated methodology for power delivery modeling and simulation

A Cross-Layer Approach for Early-Stage Power Grid Design and Optimization

Critical thermal issues in nanoscale IC design

Noise performance of 90 nm CMOS technology

A physically-based model for quantization effects in hole inversion layers

Modeling gate leakage current in nMOS structures due to tunneling through an ultra-thin oxide

Nonadiabatic particle transport in a one-dimensional electron system

Hydrodynamic (HD) simulation of N-channel MOSFET's with a computationally efficient inversion layer quantization model

Study of electron velocity overshoot in nMOS inversion layers

An efficient surface potential solution algorithm for compact MOSFET models

A three-transistor threshold voltage model for halo processes

Predictive compact modeling of NQS effects and thermal noise in 90nm mixed-signal/RF CMOS technology

Computationally efficient models for quantization effects in MOS electron and hole accumulation layers

Session 29: Modeling and simulation variability modeling and technology optimization

Investigation of quantization effects on inversion layer carrier transport in deep submicron silicon MOSFETs

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