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Field-Programmable Logic Architectures, Synthesis and Applications: 4th International Workshop on Field-Programmable Logic and Applications, FPL'94 Prague, Czech Republic, September 7–9, 1994 Proceedings

1994

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An optoelectronic 3-D Field Programmable Gate Array

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.352-360

2005

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FPGA technology mapping for power minimization

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.66-77

2005

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Artificial neural network implementation on a fine-grained FPGA

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.421-431

2005

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A new FPGA architecture for word-oriented datapaths

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.144-155

2005

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Coordinate Rotation DIgital Computer (CORDIC) synthesis for FPGA

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.397-408

2005

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Integrated layout synthesis for FPGA's

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.23-33

2005

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Image processing on a custom computing platform

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.156-167

2005

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Fault modeling and test generation for FPGAs

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.1-10

2005

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A fast FPGA implementation of a general purpose neuron

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.175-182

2005

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FPGA based prototyping for verification and evaluation in hardware-software cosynthesis

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.251-258

2005

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Simulating static and dynamic faults in BIST structures with a FPGA based emulator

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.240-250

2005

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FPGA based low cost Generic Reusable Module for the rapid prototyping of subsystems

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.259-270

2005

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ZAREPTA: A zero lead-time, all reconfigurable system for emulation, prototyping and testing of ASICs

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.230-239

2005

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An efficient technique for mapping RTL structures onto FPGAs

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.99-110

2005

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Data-procedural languages for FPL-based machines

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.183-191

2005

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A laboratory for a digital design course using FPGAs

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.385-396

2005

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Optimized synthesis of self-testable finite state machines (FSM) using BIST-PST structures in Altera structures

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.120-122

2005

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Implementing on line arithmetic on PAM

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.196-207

2005

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Software environment for WASMII: A data driven machine with a virtual hardware

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.208-219

2005

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A superscalar and reconfigurable processor

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.168-174

2005

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A Design Environment with Emulation of Prototypes for hardware/software systems using XILINX FPGA

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.315-317

2005

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FPGA based reconfigurable architecture for a compact vision system

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.141-143

2005

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Educational use of Field Programmable Gate Arrays

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.277-279

2005

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Implementing GCD systolic Arrays on FPGA

Field-Programmable Logic Architectures, Synthesis and Applications, 2005, p.132-134

2005

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Field-Programmable Logic Architectures, Synthesis and Applications: 4th International Workshop on Field-Programmable Logic and Applications, FPL'94 Prague, Czech Republic, September 7–9, 1994 Proceedings

An optoelectronic 3-D Field Programmable Gate Array

FPGA technology mapping for power minimization

Artificial neural network implementation on a fine-grained FPGA

A new FPGA architecture for word-oriented datapaths

Coordinate Rotation DIgital Computer (CORDIC) synthesis for FPGA

Integrated layout synthesis for FPGA's

Image processing on a custom computing platform

Fault modeling and test generation for FPGAs

A fast FPGA implementation of a general purpose neuron

FPGA based prototyping for verification and evaluation in hardware-software cosynthesis

Simulating static and dynamic faults in BIST structures with a FPGA based emulator

FPGA based low cost Generic Reusable Module for the rapid prototyping of subsystems

ZAREPTA: A zero lead-time, all reconfigurable system for emulation, prototyping and testing of ASICs

An efficient technique for mapping RTL structures onto FPGAs

Data-procedural languages for FPL-based machines

A laboratory for a digital design course using FPGAs

Optimized synthesis of self-testable finite state machines (FSM) using BIST-PST structures in Altera structures

Implementing on line arithmetic on PAM

Software environment for WASMII: A data driven machine with a virtual hardware

A superscalar and reconfigurable processor

A Design Environment with Emulation of Prototypes for hardware/software systems using XILINX FPGA

FPGA based reconfigurable architecture for a compact vision system

Educational use of Field Programmable Gate Arrays

Implementing GCD systolic Arrays on FPGA

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