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Fast and Precise High-Speed Channel Modeling and Optimization Technique Based on Machine Learning

IEEE transactions on electromagnetic compatibility, 2018-12, Vol.60 (6), p.2049-2052

2018

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Estimating the via-plane capacitance for differential vias with shared-antipad based on analytical equations

2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI), 2017, p.272-276

2017

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Training Set Optimization in an Artificial Neural Network Constructed for High Bandwidth Interconnects Design

IEEE transactions on microwave theory and techniques, 2022-06, Vol.70 (6), p.2955-2964

2022

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Notice of Retraction: An Efficient High-Speed Channel Modeling Method Based on Optimized Design-of-Experiment (DoE) for Artificial Neural Network Training

IEEE transactions on electromagnetic compatibility, 2018-12, Vol.60 (6), p.1648-1654

2018

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An Efficient High-Speed Channel Modeling Method Based on Optimized Design-of-Experiment (DoE) for Artificial Neural Network Training

IEEE transactions on electromagnetic compatibility, 2018-12, Vol.60 (6), p.1648

2018

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Comprehensive and Practical Way to Look at Far-End Crosstalk for Transmission Lines With Lossy Conductor and Dielectric

IEEE transactions on electromagnetic compatibility, 2020-04, Vol.62 (2), p.510-520

2020

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Equation-Based Solutions to Coupled, Asymmetrical, Lossy, and Nonuniform Microstrip Lines for Tab-Routing Applications

IEEE transactions on electromagnetic compatibility, 2019-04, Vol.61 (2), p.548-557

2019

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Prepreg and Core Dielectric Permittivity (ϵr) Extraction for Fabricated Striplines' Far-End Crosstalk Modeling

IEEE transactions on electromagnetic compatibility, 2022-02, Vol.64 (1), p.209-218

2022

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Mode-Decomposition-Based Equivalent Model of High-Speed Vias up to 100 GHz

IEEE transactions on signal and power integrity, 2023, Vol.2, p.74-83

2023

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Novel Formulations of Multireflections and Their Applications to High-Speed Channel Design

IEEE transactions on signal and power integrity, 2022, Vol.1, p.43-54

2022

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Effective and Efficient Modeling of Differential Vias Using Semi-Empirical Approach

2017 IEEE 67th Electronic Components and Technology Conference (ECTC), 2017, p.2249-2255

2017

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Impedance transparency design for PCI-Express Gen 3 SerDes channel on HDI PCBs

2014 IEEE International Symposium on Electromagnetic Compatibility (EMC), 2014, p.631-635

2014

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A survey on modeling strategies for high-speed differential Via between two parallel plates

2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI), 2017, p.527-531

2017

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A Novel 4-Port S-Parameter De-Skew Method in Frequency Domain for High-Speed Channel Design

2020 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI), 2020, p.103-107

2020

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Machine-Learning-Based Optimization of Tx Equalization Parameters of a High-Speed Channel

2023 IEEE Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMC+SIPI), 2023, p.683-687

2023

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Automated 3D discontinuity optimization with speed sensitivity for high-speed Serdes channels

2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium, 2021, p.977-981

2021

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Automated Full-Board SI Scan for High-Speed Applications up to 112Gb/s and Beyond

2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium, 2021, p.429-429

2021

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High-Speed Differential Via Optimization using a High-Accuracy and High-Bandwidth Via Model

2023 IEEE Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMC+SIPI), 2023, p.280-285

2023

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Fast Full Board Crosstalk Scan for Signal Integrity Sign-Off for High Speed PCB Designs

2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI), 2018, p.122-125

2018

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Simplified Equivalent Golden Finger Port Setup for Fast and Accurate High-Speed Channel Simulation

2023 IEEE Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMC+SIPI), 2023, p.301-305

2023

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Optimizing the Placement of Non-Functional Pads on Signal Vias Using Multiple Reflection Analysis

2022 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI), 2022, p.169-174

2022

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Mode-decomposition-based Equivalent Via (MEV) Model and MEV Model Application Range Analysis

2023 Joint Asia-Pacific International Symposium on Electromagnetic Compatibility and International Conference on ElectroMagnetic Interference & Compatibility (APEMC/INCEMIC), 2023, p.1-4

2023

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An Investigation on Multiple Reflections and Group Delay Behavior in High-Speed System Designs

2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium, 2021, p.423-428

2021

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Generic Modeling of Differential Striplines Using Machine Learning Based Regression Analysis

2020 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI), 2020, p.226-230

2020

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A Comprehensive and Practical Way to Look at Crosstalk for Transmission Lines with Mismatched Terminals

2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI), 2018, p.538-543

2018

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Fast and Precise High-Speed Channel Modeling and Optimization Technique Based on Machine Learning

Estimating the via-plane capacitance for differential vias with shared-antipad based on analytical equations

Training Set Optimization in an Artificial Neural Network Constructed for High Bandwidth Interconnects Design

Notice of Retraction: An Efficient High-Speed Channel Modeling Method Based on Optimized Design-of-Experiment (DoE) for Artificial Neural Network Training

An Efficient High-Speed Channel Modeling Method Based on Optimized Design-of-Experiment (DoE) for Artificial Neural Network Training

Comprehensive and Practical Way to Look at Far-End Crosstalk for Transmission Lines With Lossy Conductor and Dielectric

Equation-Based Solutions to Coupled, Asymmetrical, Lossy, and Nonuniform Microstrip Lines for Tab-Routing Applications

Prepreg and Core Dielectric Permittivity (ϵr) Extraction for Fabricated Striplines' Far-End Crosstalk Modeling

Mode-Decomposition-Based Equivalent Model of High-Speed Vias up to 100 GHz

Novel Formulations of Multireflections and Their Applications to High-Speed Channel Design

Effective and Efficient Modeling of Differential Vias Using Semi-Empirical Approach

Impedance transparency design for PCI-Express Gen 3 SerDes channel on HDI PCBs

A survey on modeling strategies for high-speed differential Via between two parallel plates

A Novel 4-Port S-Parameter De-Skew Method in Frequency Domain for High-Speed Channel Design

Machine-Learning-Based Optimization of Tx Equalization Parameters of a High-Speed Channel

Automated 3D discontinuity optimization with speed sensitivity for high-speed Serdes channels

Automated Full-Board SI Scan for High-Speed Applications up to 112Gb/s and Beyond

High-Speed Differential Via Optimization using a High-Accuracy and High-Bandwidth Via Model

Fast Full Board Crosstalk Scan for Signal Integrity Sign-Off for High Speed PCB Designs

Simplified Equivalent Golden Finger Port Setup for Fast and Accurate High-Speed Channel Simulation

Optimizing the Placement of Non-Functional Pads on Signal Vias Using Multiple Reflection Analysis

Mode-decomposition-based Equivalent Via (MEV) Model and MEV Model Application Range Analysis

An Investigation on Multiple Reflections and Group Delay Behavior in High-Speed System Designs

Generic Modeling of Differential Striplines Using Machine Learning Based Regression Analysis

A Comprehensive and Practical Way to Look at Crosstalk for Transmission Lines with Mismatched Terminals

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