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High-speed multioperand decimal adders

IEEE transactions on computers, 2005-08, Vol.54 (8), p.953-963

2005

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Low-Power Multiple-Precision Iterative Floating-Point Multiplier with SIMD Support

IEEE transactions on computers, 2009-02, Vol.58 (2), p.175-187

2009

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Decimal Floating-Point Multiplication

IEEE transactions on computers, 2009-07, Vol.58 (7), p.902-916

2009

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Generation and visualization of four-dimensional MR angiography data using an undersampled 3-D projection trajectory

IEEE transactions on medical imaging, 2006-02, Vol.25 (2), p.148-157

2006

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Hardware Designs for Decimal Floating-Point Addition and Related Operations

IEEE transactions on computers, 2009-03, Vol.58 (3), p.322-335

2009

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Integer multipliers with overflow detection

IEEE transactions on computers, 2006-08, Vol.55 (8), p.1062-1066

2006

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A family of variable-precision interval arithmetic processors

IEEE transactions on computers, 2000-05, Vol.49 (5), p.387-397

2000

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Approximating elementary functions with symmetric bipartite tables

IEEE transactions on computers, 1999-08, Vol.48 (8), p.842-847

1999

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Symmetric bipartite tables for accurate function approximation

Proceedings 13th IEEE Sympsoium on Computer Arithmetic, 1997, p.175-183

1997

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A New Era of Performance Evaluation

Computer (Long Beach, Calif.), 2007-09, Vol.40 (9), p.23-30

2007

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Decimal Floating-Point Multiplication Via Carry-Save Addition

18th IEEE Symposium on Computer Arithmetic (ARITH '07), 2007, p.46-55

2007

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Performance analysis of decimal floating-point libraries and its impact on decimal hardware and software solutions

2009 IEEE International Conference on Computer Design, 2009, p.465-471

2009

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A Decimal Floating-Point Adder with Decoded Operands and a Decimal Leading-Zero Anticipator

2009 19th IEEE Symposium on Computer Arithmetic, 2009, p.125-134

2009

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Decimal multiplication with efficient partial product generation

17th IEEE Symposium on Computer Arithmetic (ARITH'05), 2005, p.21-28

2005

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Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding

18th IEEE Symposium on Computer Arithmetic (ARITH '07), 2007, p.56-68

2007

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Efficacy of spiromesifen on Aceria litchii (Keifer) in relation to Cephaleuros virescens Kunze colonization on leaves of litchi (Litchi chinensis Sonn.) / Wirksamkeit von Spiromesifen auf Aceria litchii (Keifer) unter Berücksichtigung der Besiedelungsdichte von Cephaleuros virescens Kunze auf Blättern von Litchi (Litchi chinensis Sonn.)

Journal of plant diseases and protection (2006), 2007-06, Vol.114 (3), p.133-137

2007

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Efficient function approximation using truncated multipliers and squarers

17th IEEE Symposium on Computer Arithmetic (ARITH'05), 2005, p.232-239

2005

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Benchmarks and performance analysis of decimal floating-point applications

2007 25th International Conference on Computer Design, 2007, p.164-170

2007

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A high-frequency decimal multiplier

IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings, 2004, p.26-29

2004

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Floating-point division algorithms for an x86 microprocessor with a rectangular multiplier

2007 25th International Conference on Computer Design, 2007, p.304-310

2007

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Multiplier architectures for media processing

The Thrity-Seventh Asilomar Conference on Signals, Systems & Computers, 2003, 2003, Vol.2, p.2193-2197 Vol.2

2003

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A combined two's complement and floating-point comparator

2005 IEEE International Symposium on Circuits and Systems (ISCAS), 2005, p.89-92 Vol. 1

2005

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Analysis of column compression multipliers

Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, 2001, p.33-39

2001

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Potential speedup using decimal floating-point hardware

Conference Record of the Thirty-Sixth Asilomar Conference on Signals, Systems and Computers, 2002, 2002, Vol.2, p.1073-1077 vol.2

2002

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A digital ring transverse feedback low-level RF control system

2007 IEEE Particle Accelerator Conference (PAC), 2007, p.617-619

2007

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High-speed multioperand decimal adders

Low-Power Multiple-Precision Iterative Floating-Point Multiplier with SIMD Support

Decimal Floating-Point Multiplication

Generation and visualization of four-dimensional MR angiography data using an undersampled 3-D projection trajectory

Hardware Designs for Decimal Floating-Point Addition and Related Operations

Integer multipliers with overflow detection

A family of variable-precision interval arithmetic processors

Approximating elementary functions with symmetric bipartite tables

Symmetric bipartite tables for accurate function approximation

A New Era of Performance Evaluation

Decimal Floating-Point Multiplication Via Carry-Save Addition

Performance analysis of decimal floating-point libraries and its impact on decimal hardware and software solutions

A Decimal Floating-Point Adder with Decoded Operands and a Decimal Leading-Zero Anticipator

Decimal multiplication with efficient partial product generation

Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding

Efficient function approximation using truncated multipliers and squarers

Benchmarks and performance analysis of decimal floating-point applications

A high-frequency decimal multiplier

Floating-point division algorithms for an x86 microprocessor with a rectangular multiplier

Multiplier architectures for media processing

A combined two's complement and floating-point comparator

Analysis of column compression multipliers

Potential speedup using decimal floating-point hardware

A digital ring transverse feedback low-level RF control system

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