UB Paderborn / Katalog / Suche / in CDI

Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 2008-01, Vol.26 (1), p.281-285

2008

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Electrically active, ion implanted boron at the solubility limit in silicon

Applied physics letters, 1993-08, Vol.63 (8), p.1134-1136

1993

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Avoiding preamorphization damage in MeV heavy ion-implanted silicon

Applied physics letters, 1991-06, Vol.58 (24), p.2827-2829

1991

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Reduction of secondary defect formation in MeV B+ ion-implanted Si(100)

Applied physics letters, 1989-10, Vol.55 (18), p.1838-1840

1989

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Manufacturable Processes for \leq 32-nm-node CMOS Enhancement by Synchronous Optimization of Strain-Engineered Channel and External Parasitic Resistances

IEEE transactions on electron devices, 2008-05, Vol.55 (5), p.1259-1264

2008

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Productivity enhancement using a methodical approach to defect reduction based on synergy of process and defect metrology knowledge

Advanced Semiconductor Manufacturing Conference and Workshop, 2003 IEEEI/SEMI, 2003, p.9-16

2003

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IEEE_Xplore

Formation of ultrathin CoSi2 films using a two-step limited reaction process

Journal of materials research, 1993-12, Vol.8 (12), p.3111-3121

1993

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On the influence of sputter etch cleaning on the silicidation, the thermal stability and the electrical characteristics of Ti/ p−Si contacts

Solid State Electronics, 1993-05, Vol.36 (5), p.753-759

1993

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Nondestructive thickness determination of thin cobalt and cobalt disilicide layers on silicon substrates

Thin solid films, 1994-03, Vol.240 (1-2), p.110-113

1994

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Avoiding dislocations in ion-implanted silicon

ESSDERC '92: 22nd European Solid State Device Research conference, 1992, Vol.19 (1), p.357-362

1992

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O2 post deposition anneal of Al2O3 blocking dielectric for higher performance and reliability of TANOS Flash memory

2009 Proceedings of the European Solid State Device Research Conference, 2009, p.272-275

2009

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Laser-annealed junctions with advanced CMOS gate stacks for 32nm Node: Perspectives on device performance and manufacturability

2008 Symposium on VLSI Technology, 2008, p.186-187

2008

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IEEE_Xplore

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pMOSFET with 200% mobility enhancement induced by multiple stressors

Scalability of the Si/sub 1-x/Ge/sub x/ source/drain technology for the 45-nm technology node and beyond

Layout impact on the performance of a locally strained PMOSFET

Technological aspects of epitaxial CoSi2 layers for CMOS

Manufacturable Processes for < 32-nm-node CMOS Enhancement by Synchronous Optimization of Strain-Engineered Channel and External Parasitic Resistances

A new method for measuring the saturation velocity of submicron CMOS transistors

Impact of silicidation on the excess noise behaviour of mos transistors

Dislocation formation in silicon implanted at different temperatures

Reduction of boron diffusion in silicon by 1 MeV 29Si+ irradiation

Non-destructive characterization of the uniformity of thin cobalt disilicide films by Raman microprobe measurements

Two-step anneals to avoid bridging during Co silicidation

Non-destructive thickness determination of thin cobalt and cobalt disilicide layers on silicon substrates

Reduction of secondary defects in MeV ion-implanted silicon by means of ion beam defect engineering

Ultrashallow junctions formed by C coimplantation with spike plus submelt laser annealing

Electrically active, ion implanted boron at the solubility limit in silicon

Avoiding preamorphization damage in MeV heavy ion-implanted silicon

Reduction of secondary defect formation in MeV B+ ion-implanted Si(100)

Manufacturable Processes for \leq 32-nm-node CMOS Enhancement by Synchronous Optimization of Strain-Engineered Channel and External Parasitic Resistances

Productivity enhancement using a methodical approach to defect reduction based on synergy of process and defect metrology knowledge

Formation of ultrathin CoSi2 films using a two-step limited reaction process

On the influence of sputter etch cleaning on the silicidation, the thermal stability and the electrical characteristics of Ti/ p−Si contacts

Nondestructive thickness determination of thin cobalt and cobalt disilicide layers on silicon substrates

Avoiding dislocations in ion-implanted silicon

O2 post deposition anneal of Al2O3 blocking dielectric for higher performance and reliability of TANOS Flash memory

Laser-annealed junctions with advanced CMOS gate stacks for 32nm Node: Perspectives on device performance and manufacturability

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