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Innovative Materials, Devices, and CMOS Technologies for Low-Power Mobile Multimedia

IEEE transactions on electron devices, 2008-01, Vol.55 (1), p.96-130

2008

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Altitude SEE Test European Platform (ASTEP) and First Results in CMOS 130 nm SRAM

IEEE transactions on nuclear science, 2007-08, Vol.54 (4), p.1002-1009

2007

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Transient self back-biased buffer for low-voltage high-performance applications in standard CMOS technologies

Electronics letters, 1999-01, Vol.35 (2), p.112-113, Article 112

1999

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W/Ta2O5/TaN MIM capacitor for high density one time programmable memory

ESSDERC 2007 - 37th European Solid State Device Research Conference, 2007, p.230-233

2007

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Low-Power Design Solutions for Wireless Multimedia SoCs

IEEE design & test of computers, 2009-03, Vol.26 (2), p.20-29

2009

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Low voltage embedded single port SRAM generator in a 0.18 mu m standard CMOS process

Records of the IEEE International Workshop on Memory Technology, Design, and Testing, 2000

2000

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A one transistor cell on bulk substrate (1T-Bulk) for low-cost and high density eDRAM

Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004, 2004, p.128-129

2004

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An alpha immune and ultra low neutron SER high density SRAM

2004 IEEE International Reliability Physics Symposium. Proceedings, 2004, p.671-672

2004

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Device simulation of a n-DMOS cell with trench isolation

Microelectronics, 2001-01, Vol.32 (1), p.75-80

2001

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ATRS: an alternative roadmap for semiconductors, technology evolution and impacts on system architecture

12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'06), 2006, p.1 pp.-xiiii

Schoellkopf, J.-P.

2006

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Design for millimeter-wave applications in silicon technologies

ESSCIRC 2007 - 33rd European Solid-State Circuits Conference, 2007, p.464-471

2007

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Impact of interconnect performances on circuit design

Proceedings of the IEEE 1998 International Interconnect Technology Conference (Cat. No.98EX102), 1998, p.53-55

Schoellkopf, J.-P.

1998

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Test chip characterization of X architecture diagonal lines for SoC design

Proceedings of the 2004 International Conference on Microelectronic Test Structures (IEEE Cat. No.04CH37516), 2004, p.75-79

2004

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New interconnect capacitance characterization method for multilevel metal CMOS processes

Proceedings of the IEEE 1999 International Interconnect Technology Conference (Cat. No.99EX247), 1999, p.224-226

1999

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Microprogramming: A step of a top-down design methodology

Conference record of the 7th annual workshop on Microprogramming, 1974, p.203-207

Schoellkopf, J. P.

1974

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Datapath Design for FISC: A 16-bit P-CODE Microprocessor

ESSCIRC '83: Ninth European Solid-State Circuits Conference, 1983, p.179-182

Schoellkopf, J.P.

1983

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PASC-HLL: An experience in design techniques for firmware and the supporting hardware

SIGMICRO newsletter (1988), 1978-12, Vol.9 (4), p.81

Schoellkopf, J. P.

1978

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One time programmable drift antifuse cell reliability

2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059), 2000, p.169-173

2000

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A 1.0V 180Mhz 85 µ W/Mhz 8k × 16b SRAM in a standard 0.25 µm CMOS

Proceedings of the 24th European Solid-State Circuits Conference, 1998, p.192-195

1998

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A one transistor cell on bulk substrate (1T-bulk) for low-cost and high density eDRAM

Volltextzugriff (PDF)

Design of a Self-Checking Microprocessor for Real-Time Applications

IFAC Proceedings Volumes, 1985-10, Vol.18 (12), p.95-99

1985

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DESIGN OF A SELF-CHECKING MICROPROCESSOR FOR REAL-TIME APPLICATIONS

Control in Transportation Systems 1986, 1987, p.337-343

1987

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Observation of mixed fermionic-bosonic helium clusters by transmission grating diffraction

Physical review letters, 2005-09, Vol.95 (11), p.113402.1-113402.4, Article 113402

2005

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Innovative Materials, Devices, and CMOS Technologies for Low-Power Mobile Multimedia

Altitude SEE Test European Platform (ASTEP) and First Results in CMOS 130 nm SRAM

Transient self back-biased buffer for low-voltage high-performance applications in standard CMOS technologies

W/Ta2O5/TaN MIM capacitor for high density one time programmable memory

Low-Power Design Solutions for Wireless Multimedia SoCs

Low voltage embedded single port SRAM generator in a 0.18 mu m standard CMOS process

A one transistor cell on bulk substrate (1T-Bulk) for low-cost and high density eDRAM

An alpha immune and ultra low neutron SER high density SRAM

Device simulation of a n-DMOS cell with trench isolation

ATRS: an alternative roadmap for semiconductors, technology evolution and impacts on system architecture

Design for millimeter-wave applications in silicon technologies

Impact of interconnect performances on circuit design

Test chip characterization of X architecture diagonal lines for SoC design

New interconnect capacitance characterization method for multilevel metal CMOS processes

Microprogramming: A step of a top-down design methodology

Datapath Design for FISC: A 16-bit P-CODE Microprocessor

PASC-HLL: An experience in design techniques for firmware and the supporting hardware

One time programmable drift antifuse cell reliability

A 1.0V 180Mhz 85 µ W/Mhz 8k × 16b SRAM in a standard 0.25 µm CMOS

A one transistor cell on bulk substrate (1T-bulk) for low-cost and high density eDRAM

Design of a Self-Checking Microprocessor for Real-Time Applications

DESIGN OF A SELF-CHECKING MICROPROCESSOR FOR REAL-TIME APPLICATIONS

Observation of mixed fermionic-bosonic helium clusters by transmission grating diffraction

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