UB Paderborn / Katalog / Suche / in CDI

Sortiert nach

Einfacher Volltextzugriff von (fast) überall

Installieren Sie die LibKey Nomad-Browsererweiterung und erhalten Sie von vielen Webseiten einfachen Zugriff auf lizenzierte Volltexte oder Open Access Publikationen. Mehr erfahren...

Future Contract Selection by Term Structure Analysis

Advances in Science, Technology and Engineering Systems Journal (ASTESJ), 2017-07, Vol.2 (3), p.1172-1180

2017

Volltextzugriff (PDF)

Development of a high-resolution NGS-based HLA-typing and analysis pipeline

Nucleic acids research, 2015-06, Vol.43 (11), p.e70-e70

2015

Volltextzugriff (PDF)

Optimizing Investment Strategies with the Reconfigurable Hardware Platform RIVYERA

International Journal of Reconfigurable Computing, 2012-01, Vol.2012 (2012), p.458-467

2012

Volltextzugriff (PDF)

Parallelizing Epistasis Detection in GWAS on FPGA and GPU-Accelerated Computing Systems

IEEE/ACM transactions on computational biology and bioinformatics, 2015-09, Vol.12 (5), p.982-994

2015

Volltextzugriff (PDF)

High-speed exhaustive 3-locus interaction epistasis analysis on FPGAs

Journal of computational science, 2015-07, Vol.9, p.131-136

2015

Volltextzugriff (PDF)

Breaking Ciphers with COPACOBANA –A Cost-Optimized Parallel Code Breaker

Cryptographic Hardware and Embedded Systems - CHES 2006, 2006, p.101-118

2006

Volltextzugriff (PDF)

An efficient implementation of PBKDF2 with RIPEMD-160 on multiple FPGAs

2014 20th IEEE International Conference on Parallel and Distributed Systems (ICPADS), 2014, p.454-461

2014

Volltextzugriff (PDF)

FPGA-based Acceleration of Detecting Statistical Epistasis in GWAS

Procedia computer science, 2014, Vol.29, p.220-230

2014

Volltextzugriff (PDF)

Massively parallel FPGA-based implementation of BLASTp with the two-hit method

Procedia computer science, 2011, Vol.4, p.1967-1976

2011

Volltextzugriff (PDF)

An FPGA Implementation of an Investment Strategy Processor

Procedia computer science, 2012, Vol.9, p.1880-1889

2012

Volltextzugriff (PDF)

Efficient parallel multiplication algorithm for large integers

Lecture notes in computer science, 2003, p.923-928

2003

Volltextzugriff (PDF)

GPGPU-based identification of cointegrated portfolios

2017 IEEE Symposium Series on Computational Intelligence (SSCI), 2017, p.1-6

2017

Volltextzugriff (PDF)

Architectures and Algorithms for Multimedia Applications

Euro-Par 2000 Parallel Processing, 2000, p.1085-1085

2000

Volltextzugriff (PDF)

Master/Slave assignment optimization for high performance computing in an EC2 cloud using MPI

Network protocols and algorithms, 2012-05, Vol.4 (1)

2012

Volltextzugriff (PDF)

Dictionary Attack on TrueCrypt with RIVYERA S3-5000

2012 IEEE 18th International Conference on Parallel and Distributed Systems, 2012, p.93-100

2012

Volltextzugriff (PDF)

Portfolio-based contract selection in commodity futures markets

2016 IEEE Symposium Series on Computational Intelligence (SSCI), 2016, p.1-7

2016

Volltextzugriff (PDF)

A correction network for N-sorters

SIAM journal on computing, 1989-12, Vol.18 (6), p.1179-1187

1989

Volltextzugriff (PDF)

Using the reconfigurable massively parallel architecture COPACOBANA 5000 for applications in bioinformatics

Procedia computer science, 2010, Vol.1 (1), p.1027-1034

2010

Volltextzugriff (PDF)

MPI Performance Analysis of Amazon EC2 Cloud Services for High Performance Computing

Advances in Computing and Communications, p.371-381

Volltextzugriff (PDF)

An area-efficient bit-serial integer and GF(2n) multiplier : On VLSI design and test

Microelectronic engineering, 2007, Vol.84 (2), p.253-259

2007

Volltextzugriff (PDF)

Improvement of BLASTp on the FPGA-Based High-Performance Computer RIVYERA

Bioinformatics Research and Applications, p.275-286

Volltextzugriff (PDF)

An area-efficient bit-serial integer and GF(2 n ) multiplier

Microelectronic engineering, 2007-02, Vol.84 (2), p.253-259

2007

Volltextzugriff (PDF)

Receiver Sensitivity of Advanced Modulation Formats for 40 Gb/s DWDM Transmission with and without FEC

2006 European Conference on Optical Communications, 2006, p.1-2

2006

Volltextzugriff (PDF)

A hybrid architecture for bioinformatics

Future generation computer systems, 2002-05, Vol.18 (6), p.855-862

2002

Volltextzugriff (PDF)

A Massively Parallel Architecture for Bioinformatics

Computational Science – ICCS 2009, p.994-1003

Volltextzugriff (PDF)

1 – 25 von 58

Suche als RSS-Feed

Suchergebnisse filtern

Filter anzeigen

Nur zeigen

Geprüft (Peer-Review)
(36)
Mit Volltextzugriff
(55)

Publikationsform

Sprache

Erscheinungsjahr

n.n

Neu hinzugefügt

... seit 90 Tagen
(1)

Menü

Weitere Dienste

Einstellungen

Future Contract Selection by Term Structure Analysis

Development of a high-resolution NGS-based HLA-typing and analysis pipeline

Optimizing Investment Strategies with the Reconfigurable Hardware Platform RIVYERA

Parallelizing Epistasis Detection in GWAS on FPGA and GPU-Accelerated Computing Systems

High-speed exhaustive 3-locus interaction epistasis analysis on FPGAs

Breaking Ciphers with COPACOBANA –A Cost-Optimized Parallel Code Breaker

An efficient implementation of PBKDF2 with RIPEMD-160 on multiple FPGAs

FPGA-based Acceleration of Detecting Statistical Epistasis in GWAS

Massively parallel FPGA-based implementation of BLASTp with the two-hit method

An FPGA Implementation of an Investment Strategy Processor

Efficient parallel multiplication algorithm for large integers

GPGPU-based identification of cointegrated portfolios

Architectures and Algorithms for Multimedia Applications

Master/Slave assignment optimization for high performance computing in an EC2 cloud using MPI

Dictionary Attack on TrueCrypt with RIVYERA S3-5000

Portfolio-based contract selection in commodity futures markets

A correction network for N-sorters

Using the reconfigurable massively parallel architecture COPACOBANA 5000 for applications in bioinformatics

MPI Performance Analysis of Amazon EC2 Cloud Services for High Performance Computing

An area-efficient bit-serial integer and GF(2n) multiplier : On VLSI design and test

Improvement of BLASTp on the FPGA-Based High-Performance Computer RIVYERA

An area-efficient bit-serial integer and GF(2 n ) multiplier

Receiver Sensitivity of Advanced Modulation Formats for 40 Gb/s DWDM Transmission with and without FEC

A hybrid architecture for bioinformatics

A Massively Parallel Architecture for Bioinformatics

Suchergebnisse filtern