UB Paderborn / Katalog / Suche / in CDI

Sortiert nach

Einfacher Volltextzugriff von (fast) überall

Installieren Sie die LibKey Nomad-Browsererweiterung und erhalten Sie von vielen Webseiten einfachen Zugriff auf lizenzierte Volltexte oder Open Access Publikationen. Mehr erfahren...

A First Step Toward On-Chip Memory Mapping for Parallel Turbo and LDPC Decoders: A Polynomial Time Mapping Algorithm

IEEE transactions on signal processing, 2013-08, Vol.61 (16), p.4127-4140

2013

Volltextzugriff (PDF)

A First Step Toward On-Chip Memory Mapping for Parallel Turbo and LDPC Decoders: A Polynomial Time Mapping Algorithm

IEEE transactions on signal processing, 2013-06, p.xx-yy

2013

Volltextzugriff (PDF)

A dynamically reconfigurable ECC decoder architecture

2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, p.1437-1440

2016

Volltextzugriff (PDF)

In-place memory mapping approach for optimized parallel hardware interleaver architectures

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015, p.896-899

2015

Volltextzugriff (PDF)

In-place memory mapping approach for optimized parallel hardware interleaver architectures

2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, p.896-899

2015

Volltextzugriff (PDF)

Embedding polynomial time memory mapping and routing algorithms on-chip to design configurable decoder architectures

2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2014, p.5036-5040

2014

Volltextzugriff (PDF)

Design and analysis of fuzzy logic based robust PID controller for PWM-based switching converter

2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2011, p.777-780

2011

Volltextzugriff (PDF)

On-chip implementation of memory mapping algorithm to support flexible decoder architecture

2013 IEEE International Conference on Acoustics, Speech and Signal Processing, 2013, p.2751-2755

2013

Volltextzugriff (PDF)

A methodology based on Transportation problem modeling for designing parallel interleaver architectures

2011 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2011, p.1613-1616

2011

Volltextzugriff (PDF)

An approach based on edge coloring of tripartite graph for designing parallel LDPC interleaver architecture

2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2011, p.1720-1723

2011

Volltextzugriff (PDF)

Energy proportional computing with OpenCL on a FPGA-based overlay architecture

2016 IEEE Nordic Circuits and Systems Conference (NORCAS), 2016, p.1-6

2016

Volltextzugriff (PDF)

Design of parallel LDPC interleaver architecture: A bipartite edge coloring approach

2010 17th IEEE International Conference on Electronics, Circuits and Systems, 2010, p.466-469

2010

Volltextzugriff (PDF)

A Dedicated Approach to Explore Design Space for Hardware Architecture of Turbo Decoders

2012 IEEE Workshop on Signal Processing Systems, 2012, p.288-293

2012

Volltextzugriff (PDF)

Big Data Assisted Empirical Study for Business Value Identification Using Smart Technologies: An Empirical Study for Business Value Identification of Big Data Adaption in E-Commerce

International journal of e-collaboration, 2023-01, Vol.19 (7), p.1-19

2023

Volltextzugriff (PDF)

Stacking of Canopy Spectral Reflectance from Multiple Growth Stages Improves Grain Yield Prediction under Full and Limited Irrigation in Wheat

Remote sensing (Basel, Switzerland), 2022-09, Vol.14 (17), p.4318

2022

Volltextzugriff (PDF)

Advanced photodegradation and antimicrobial performance: A comparative study of Al/Ag-Co-doped ZnO synthesis via laser assist chemical bath

Materials science & engineering. B, Solid-state materials for advanced technology, 2024-11, Vol.309, p.117649, Article 117649

2024

Volltextzugriff (PDF)

Interfacing Power System and ICT Simulators: Challenges, State-of-the-Art, and Case Studies

IEEE transactions on smart grid, 2018-01, Vol.9 (1), p.14-24

2018

Volltextzugriff (PDF)

1 – 17 von 17

Suche als RSS-Feed

Suchergebnisse filtern

Filter anzeigen

Nur zeigen

Geprüft (Peer-Review)
(6)
Mit Volltextzugriff
(16)

Publikationsform

Tagungsberichte
(11)
Artikel
(6)

Sprache

Englisch
(17)

Erscheinungsjahr

n.n

Thema

Science & Technology
(13)
Technology
(13)
Engineering
(10)
Engineering, Electrical & Electronic
(10)
Decoding
(7)
Computer Science
(4)
Random Access Memory
(4)
Turbo Codes
(4)
Acoustics
(3)
Computer Architecture
(3)
Hardware
(3)
Image Color Analysis
(3)
Interleaver
(3)
Memory Management
(3)
Partitioning Algorithms
(3)
Algorithm Design And Analysis
(2)
Algorithms
(2)
Architecture
(2)
Conflict Free Memory Mapping
(2)
Error Correction Codes
(2)

15 weitere anzeigen...

Weniger anzeigen...

Kollektion

IEEE Xplore (IEEE/IET Electronic Library - IEL)
(14)
Ingenta
(5)
IngentaConnect Journals
(2)
ACM Digital Library
(1)
InfoSci-Journals (Full collection)
(1)
EZB Electronic Journals Library
(1)
Elsevier ScienceDirect Journals
(1)

2 weitere anzeigen...

Weniger anzeigen...

Zeitschrift / Serie

Neu hinzugefügt

... seit 90 Tagen
(1)

Menü

Weitere Dienste

Einstellungen

A First Step Toward On-Chip Memory Mapping for Parallel Turbo and LDPC Decoders: A Polynomial Time Mapping Algorithm

A First Step Toward On-Chip Memory Mapping for Parallel Turbo and LDPC Decoders: A Polynomial Time Mapping Algorithm

A dynamically reconfigurable ECC decoder architecture

In-place memory mapping approach for optimized parallel hardware interleaver architectures

In-place memory mapping approach for optimized parallel hardware interleaver architectures

Embedding polynomial time memory mapping and routing algorithms on-chip to design configurable decoder architectures

Design and analysis of fuzzy logic based robust PID controller for PWM-based switching converter

On-chip implementation of memory mapping algorithm to support flexible decoder architecture

A methodology based on Transportation problem modeling for designing parallel interleaver architectures

An approach based on edge coloring of tripartite graph for designing parallel LDPC interleaver architecture

Energy proportional computing with OpenCL on a FPGA-based overlay architecture

Design of parallel LDPC interleaver architecture: A bipartite edge coloring approach

A Dedicated Approach to Explore Design Space for Hardware Architecture of Turbo Decoders

Big Data Assisted Empirical Study for Business Value Identification Using Smart Technologies: An Empirical Study for Business Value Identification of Big Data Adaption in E-Commerce

Stacking of Canopy Spectral Reflectance from Multiple Growth Stages Improves Grain Yield Prediction under Full and Limited Irrigation in Wheat

Advanced photodegradation and antimicrobial performance: A comparative study of Al/Ag-Co-doped ZnO synthesis via laser assist chemical bath

Interfacing Power System and ICT Simulators: Challenges, State-of-the-Art, and Case Studies

Suchergebnisse filtern