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Languages, Compilers, and Tools for Embedded Systems: ACM SIGPLAN Workshop LCTES 2000, Vancouver, Canada, June 18, 2000, Proceedings

1, 2001

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A space-efficient flash translation layer for CompactFlash systems

IEEE transactions on consumer electronics, 2002-05, Vol.48 (2), p.366-375

2002

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An exact stochastic analysis of priority-driven periodic real-time systems and its approximations

IEEE transactions on computers, 2005-11, Vol.54 (11), p.1460-1466

2005

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Chameleon: A High Performance Flash/FRAM Hybrid Solid State Disk Architecture

IEEE computer architecture letters, 2008-01, Vol.7 (1), p.17-20

2008

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Ozone (O3): An Out-of-Order Flash Memory Controller Architecture

IEEE transactions on computers, 2011-05, Vol.60 (5), p.653-666

2011

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Software Technologies for Embedded and Ubiquitous Systems: 8th IFIP WG 10.2 International Workshop, SEUS 2010, Waidhofen/Ybbs, Austria, October 13-15, 2010, Proceedings

2010 edition, 2010

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QoS-Aware Flash Memory Controller

2017 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2017, p.51-62

2017

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Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture

IEEE transactions on computers, 2010-07, Vol.59 (7), p.905-921

2010

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Bounding cache-related preemption delay for real-time systems

IEEE transactions on software engineering, 2001-09, Vol.27 (9), p.805-826

2001

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LRFU: a spectrum of policies that subsumes the least recently used and least frequently used policies

IEEE transactions on computers, 2001-12, Vol.50 (12), p.1352-1361

2001

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Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU

IEEE transactions on computers, 2010-08, Vol.59 (8), p.1047-1062

2010

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Design, implementation, and performance evaluation of a detection-based adaptive block replacement scheme

IEEE transactions on computers, 2002-07, Vol.51 (7), p.793-800

2002

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Limited preemptible scheduling to embrace cache memory in real-time systems

Languages, Compilers, and Tools for Embedded Systems, 2006, p.51-64

2006

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Efficient replacement of nonuniform objects in Web caches

Computer (Long Beach, Calif.), 2002-06, Vol.35 (6), p.65-73

2002

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FSA-based link assignment and routing in low-earth orbit satellite networks

IEEE transactions on vehicular technology, 1998-08, Vol.47 (3), p.1037-1048

1998

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Analysis of cache-related preemption delay in fixed-priority preemptive scheduling

IEEE transactions on computers, 1998-06, Vol.47 (6), p.700-713

1998

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Dynamic voltage scaling algorithm for dynamic-priority hard real-time systems using slack time analysis

Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition, 2002, p.788-794

2002

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An Abstract Fault Model for NAND Flash Memory

IEEE embedded systems letters, 2012-12, Vol.4 (4), p.86-89

2012

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A predictive call admission control scheme for low Earth orbit satellite networks

IEEE transactions on vehicular technology, 2000-11, Vol.49 (6), p.2320-2335

2000

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Performance comparison of dynamic voltage scaling algorithms for hard real-time systems

Proceedings. Eighth IEEE Real-Time and Embedded Technology and Applications Symposium, 2002, p.219-228

2002

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Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03, 2003, p.396-401

2003

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A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor

Lecture notes in computer science, 2004, p.244-258

2004

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Message from the General Chairs

2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), 2016, p.xii-xii

2016

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SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms

Lecture notes in computer science, 2003, p.141-156

2003

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An accurate worst case timing analysis for RISC processors

IEEE transactions on software engineering, 1995-07, Vol.21 (7), p.593-604

1995

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Languages, Compilers, and Tools for Embedded Systems: ACM SIGPLAN Workshop LCTES 2000, Vancouver, Canada, June 18, 2000, Proceedings

A space-efficient flash translation layer for CompactFlash systems

An exact stochastic analysis of priority-driven periodic real-time systems and its approximations

Chameleon: A High Performance Flash/FRAM Hybrid Solid State Disk Architecture

Ozone (O3): An Out-of-Order Flash Memory Controller Architecture

Software Technologies for Embedded and Ubiquitous Systems: 8th IFIP WG 10.2 International Workshop, SEUS 2010, Waidhofen/Ybbs, Austria, October 13-15, 2010, Proceedings

QoS-Aware Flash Memory Controller

Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture

Bounding cache-related preemption delay for real-time systems

LRFU: a spectrum of policies that subsumes the least recently used and least frequently used policies

Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU

Design, implementation, and performance evaluation of a detection-based adaptive block replacement scheme

Limited preemptible scheduling to embrace cache memory in real-time systems

Efficient replacement of nonuniform objects in Web caches

FSA-based link assignment and routing in low-earth orbit satellite networks

Analysis of cache-related preemption delay in fixed-priority preemptive scheduling

Dynamic voltage scaling algorithm for dynamic-priority hard real-time systems using slack time analysis

An Abstract Fault Model for NAND Flash Memory

A predictive call admission control scheme for low Earth orbit satellite networks

Performance comparison of dynamic voltage scaling algorithms for hard real-time systems

Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis

A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor

Message from the General Chairs

SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms

An accurate worst case timing analysis for RISC processors

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