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Recommendations for using Simulated Annealing in task mapping

Design automation for embedded systems, 2013, Vol.17 (1), p.53-85

2013

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Measuring the SoC development process quality with Fault-slip-Through methodology

2024 13th Mediterranean Conference on Embedded Computing (MECO), 2024, p.1-8

2024

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UML-based multiprocessor SoC design framework

ACM transactions on embedded computing systems, 2006-05, Vol.5 (2), p.281-320

2006

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MARTE profile extension for modeling dynamic power management of embedded systems

Journal of systems architecture, 2012-04, Vol.58 (5), p.209-219

2012

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A scalable, non-interfering, synthesizable Network-on-Chip monitor – Extended version

Microprocessors and microsystems, 2013-06, Vol.37 (4-5), p.446-459

2013

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Automated memory-aware application distribution for Multi-processor System-on-Chips

Journal of systems architecture, 2007-11, Vol.53 (11), p.795-815

2007

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Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor

2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 2011, p.286-293

2011

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Benchmarking mesh and hierarchical bus networks in system-on-chip context

Journal of systems architecture, 2007-08, Vol.53 (8), p.477-488

2007

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Evaluating SoC Network Performance in MPEG-4 Encoder

Journal of signal processing systems, 2009-09, Vol.56 (2-3), p.105-123

2009

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Evaluating Large System-on-Chip on Multi-FPGA Platform

Embedded Computer Systems: Architectures, Modeling, and Simulation, p.179-189

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Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation

EURASIP journal on embedded systems, 2009-09, Vol.2009 (1), p.826296-826296

2009

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Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009, p.244-249

2009

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Gamification of System-on-Chip design

2014 International Symposium on System-on-Chip (SoC), 2014, p.1-8

2014

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Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation

EURASIP journal on embedded systems, 2009, Vol.2009 (1), p.1-16

2009

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Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context

Embedded Computer Systems: Architectures, Modeling, and Simulation, 2005, p.354-363

2005

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Teaching system-on-chip design with FPGAs

Proceedings of the 10th FPGAworld Conference, 2013, p.1-7

2013

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Evaluating the model accuracy in automated design space exploration

Microprocessors and microsystems, 2008-08, Vol.32 (5), p.321-329

2008

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A Communication-Centric Design Flow for HIBI-Based SoCs

Computer Systems: Architectures, Modeling, and Simulation, 2004, p.474-483

2004

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HIBI-based multiprocessor SoC on FPGA

2005 IEEE International Symposium on Circuits and Systems (ISCAS), 2005, p.3351-3354 Vol. 4

2005

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Implementing a WLAN Video Terminal Using UML and Fully Automated Design Flow

EURASIP journal on embedded systems, 2007-03, Vol.2007 (1), p.85029-085029

2007

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Experiences from System-on-Chip design courses

10th European Workshop on Microelectronics Education (EWME), 2014, p.37-42

2014

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Configurable Multiprocessor Platform with RTOS for Distributed Execution of UML 2.0 Designed Applications

Proceedings of the Design Automation & Test in Europe Conference, 2006, Vol.1, p.1-6

2006

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WarmPie: A bare-bones implementation of message passing interface for embedded many-cores

2015 11th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), 2015, p.33-36

2015

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HIBI v.2 Communication Network for System-on-Chip

Computer Systems: Architectures, Modeling, and Simulation, p.413-422

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MCAPI abstraction on FPGA based SoC design

Proceedings of the Annual FPGA Conference, 2012, p.1-6

2012

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Recommendations for using Simulated Annealing in task mapping

Measuring the SoC development process quality with Fault-slip-Through methodology

UML-based multiprocessor SoC design framework

MARTE profile extension for modeling dynamic power management of embedded systems

A scalable, non-interfering, synthesizable Network-on-Chip monitor – Extended version

Automated memory-aware application distribution for Multi-processor System-on-Chips

Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor

Benchmarking mesh and hierarchical bus networks in system-on-chip context

Evaluating SoC Network Performance in MPEG-4 Encoder

Evaluating Large System-on-Chip on Multi-FPGA Platform

Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation

Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA

Gamification of System-on-Chip design

Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation

Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context

Teaching system-on-chip design with FPGAs

Evaluating the model accuracy in automated design space exploration

A Communication-Centric Design Flow for HIBI-Based SoCs

HIBI-based multiprocessor SoC on FPGA

Implementing a WLAN Video Terminal Using UML and Fully Automated Design Flow

Experiences from System-on-Chip design courses

Configurable Multiprocessor Platform with RTOS for Distributed Execution of UML 2.0 Designed Applications

WarmPie: A bare-bones implementation of message passing interface for embedded many-cores

HIBI v.2 Communication Network for System-on-Chip

MCAPI abstraction on FPGA based SoC design

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