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Design and characterization of submicron BiCMOS compatible high-voltage NMOS and PMOS devices

IEEE transactions on electron devices, 1997-02, Vol.44 (2), p.331-338

1997

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An 8-bit 12.5-GSample/s SiGe ADC

Analog integrated circuits and signal processing, 2010-06, Vol.63 (3), p.381-395

2010

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A short loop SLIC in a submicron BiCMOS technology

Proceedings of 9th International Symposium on Power Semiconductor Devices and IC's, 1997, p.329-332

1997

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A self-aligned trenched cathode lateral insulated gate bipolar transistor with high latch-up resistance

IEEE transactions on electron devices, 1995-12, Vol.42 (12), p.2236-2239

1995

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Robust two-stage current-controlled oscillator in submicrometre CMOS

Electronics letters, 1999-10, Vol.35 (21), p.1837-1839

1999

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A 2 GHz, 60V-class, SOI power LDMOSFET for base station applications

ISPSD '03. 2003 IEEE 15th International Symposium on Power Semiconductor Devices and ICs, 2003. Proceedings, 2003, p.270-273

2003

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Analytical modeling of threshold voltages in p-channel Si/SiGe/Si MOS structures

Solid State Electronics, 1993-05, Vol.36 (5), p.775-783

1993

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Breakdown voltage in LDMOS transistors using internal field rings

IEEE transactions on electron devices, 1991-07, Vol.38 (7), p.1676-1680

1991

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New technique for the characterization of Si/SiGe layers using heterostructure MOS capacitors

Solid-state electronics, 1994-08, Vol.37 (8), p.1491-1501

1994

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High-voltage multiple-resistivity drift-region LDMOS

Energy (Oxford), 1995, Vol.20 (11), p.1173-1174

1995

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Analytical and experimental characteristics of SiGe heterojunction bipolar transistors with thin α-Si:H emitters

Solid-state electronics, 1995-10, Vol.38 (10), p.1829-1834

1995

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1.5 V bootstrapped BiCMOS logic gate

Electronics letters, 1993, Vol.29 (3), p.307

1993

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2D numerical investigation of the impact of compositional grading on the performance of submicrometer Si-SiGe MOSFET's

IEEE transactions on electron devices, 1995-06, Vol.42 (6), p.1039-1046

1995

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Theory of a novel voltage-sustaining layer for power devices

Microelectronics, 1998-12, Vol.29 (12), p.1005-1011

1998

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GaAs split phase dynamic logic

IEEE journal of solid-state circuits, 1994-05, Vol.29 (5), p.617-622

1994

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A new approach to CV profiling with sub-Debye-length resolution

Solid-state electronics, 1991-03, Vol.34 (3), p.309-314

1991

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Lateral high-voltage devices using an optimized variational lateral doping

International journal of electronics, 1996-03, Vol.80 (3), p.449-459

1996

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A new method for fixed oxide charge determination using a dual-gate MOS capacitor

IEEE transactions on electron devices, 1991-11, Vol.38 (11), p.2565-2567

1991

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Modeling the d.c. characteristics of merged bipolar-MOS structures

Solid-state electronics, 1994, Vol.37 (3), p.387-392

1994

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Improved double cascode self-bootstrapping technique for gain enhancement in GaAs MESFET opamps

Electronics letters, 1992-06, Vol.28 (12), p.1128-1129

1992

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Algorithmic analogue/digital convertor based on current mirrors

Electronics letters, 1988-03, Vol.24 (8), p.471-472, Article 471

1988

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A novel body contact for SIMOX based SOI MOSFETs

Solid-state electronics, 1991-10, Vol.34 (10), p.1071-1075, Article 1071

1991

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New method for extraction of effective channel length in submicron MOSFETs

Electronics letters, 1991-01, Vol.27 (6), p.508-509

1991

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Wide dynamic range four-quadrant CMOS analog multiplier using linearized transconductance stages

IEEE journal of solid-state circuits, 1986-12, Vol.21 (6), p.1120-1122

1986

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GaAs capacitively coupled domino logic gate

Electronics letters, 1989-12, Vol.25 (25), p.1714

1989

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Design and characterization of submicron BiCMOS compatible high-voltage NMOS and PMOS devices

An 8-bit 12.5-GSample/s SiGe ADC

A short loop SLIC in a submicron BiCMOS technology

A self-aligned trenched cathode lateral insulated gate bipolar transistor with high latch-up resistance

Robust two-stage current-controlled oscillator in submicrometre CMOS

A 2 GHz, 60V-class, SOI power LDMOSFET for base station applications

Analytical modeling of threshold voltages in p-channel Si/SiGe/Si MOS structures

Breakdown voltage in LDMOS transistors using internal field rings

New technique for the characterization of Si/SiGe layers using heterostructure MOS capacitors

High-voltage multiple-resistivity drift-region LDMOS

Analytical and experimental characteristics of SiGe heterojunction bipolar transistors with thin α-Si:H emitters

1.5 V bootstrapped BiCMOS logic gate

2D numerical investigation of the impact of compositional grading on the performance of submicrometer Si-SiGe MOSFET's

Theory of a novel voltage-sustaining layer for power devices

GaAs split phase dynamic logic

A new approach to CV profiling with sub-Debye-length resolution

Lateral high-voltage devices using an optimized variational lateral doping

A new method for fixed oxide charge determination using a dual-gate MOS capacitor

Modeling the d.c. characteristics of merged bipolar-MOS structures

Improved double cascode self-bootstrapping technique for gain enhancement in GaAs MESFET opamps

Algorithmic analogue/digital convertor based on current mirrors

A novel body contact for SIMOX based SOI MOSFETs

New method for extraction of effective channel length in submicron MOSFETs

Wide dynamic range four-quadrant CMOS analog multiplier using linearized transconductance stages

GaAs capacitively coupled domino logic gate

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