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Guest Editorial Special Section on EDTM 2022

IEEE journal of the Electron Devices Society, 2022, Vol.10, p.860-860

Saitoh, Masumi

2022

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Low-power linear computation using nonlinear ferroelectric tunnel junction memristors

Nature electronics, 2020-05, Vol.3 (5), p.259-266

2020

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Comprehensive study of variability in poly-Si channel nanowire transistor

Japanese Journal of Applied Physics, 2019-04, Vol.58 (SB), p.SBBA06

2019

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Experimental Study of Random Telegraph Noise in Trigate Nanowire MOSFETs

IEEE transactions on electron devices, 2015-11, Vol.62 (11), p.3799-3804

2015

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Threshold Voltage Control by Substrate Bias in 10-nm-Diameter Tri-Gate Nanowire MOSFET on Ultrathin BOX

IEEE electron device letters, 2013-02, Vol.34 (2), p.187-189

2013

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Toe Clearance Rehabilitative Slippers for Older Adults With Fall Risk: A Randomized Controlled Trial

Geriatric orthopaedic surgery & rehabilitation, 2021, Vol.12, p.21514593211029102-21514593211029102

2021

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Probing spatial heterogeneity in silicon thin films by Raman spectroscopy

Scientific reports, 2017-11, Vol.7 (1), p.16549-8, Article 16549

2017

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Individual analysis of inter and intragrain defects in electrically characterized polycrystalline silicon nanowire TFTs by multicomponent dark-field imaging based on nanobeam electron diffraction two-dimensional mapping

Japanese Journal of Applied Physics, 2018-04, Vol.57 (4S), p.4

2018

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Experimental Study of Self-Heating Effects in Trigate Nanowire MOSFETs Considering Device Geometry

IEEE transactions on electron devices, 2012-12, Vol.59 (12), p.3239-3242

2012

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Experimental study of time-dependent dielectric breakdown in tri-gate nanowire transistor

Japanese Journal of Applied Physics, 2016-08, Vol.55 (8S2), p.8-08PD05

2016

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Extension of Coulomb blockade region by quantum confinement in the ultrasmall silicon dot in a single-hole transistor at room temperature

Applied physics letters, 2004-04, Vol.84 (16), p.3172-3174

2004

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Channel size dependence of low-frequency noise in tri-gate silicon nanowire transistors

Japanese Journal of Applied Physics, 2015-04, Vol.54 (4), p.44201-1-044201-3

2015

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Physical mechanism of source and drain resistance reduction for high-performance short-channel InGaZnO thin-film transistors

Japanese Journal of Applied Physics, 2015-04, Vol.54 (4S), p.4-1-04DF06-4

2015

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Hole mobility enhancement by double-gate mode in ultrathin-body silicon-on-insulator p -type metal-oxide-semiconductor field-effect transistors

Journal of applied physics, 2009-07, Vol.106 (2), p.024511-024511-6

2009

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SPICE-Based Performance Analysis of Trigate Silicon Nanowire CMOS Circuits

IEEE transactions on electron devices, 2013-04, Vol.60 (4), p.1451-1456

2013

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Voltage gain dependence of the negative differential conductance width in silicon single-hole transistors

Applied physics letters, 2006-04, Vol.88 (14)

2006

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Large memory window and long charge-retention time in ultranarrow-channel silicon floating-dot memory

Applied physics letters, 2003-03, Vol.82 (11), p.1787-1789

2003

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Physical Origins of Threshold Voltage Variation Enhancement in Si(110) n/pMOSFETs

IEEE transactions on electron devices, 2010-10, Vol.57 (10), p.2493-2498

2010

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Experimental study of uniaxial stress effects on Coulomb-limited mobility in p -type metal-oxide-semiconductor field-effect transistors

Applied physics letters, 2007-11, Vol.91 (20), p.203506-203506-3

2007

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One-to-one correspondence between nm-resolution channel crystallinity and electrical property of poly-Si TFT revealed by NBD two-dimensional imaging

2017 IEEE International Reliability Physics Symposium (IRPS), 2017, p.5C-2.1-5C-2.5

2017

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Systematic study of RTN in nanowire transistor and enhanced RTN by hot carrier injection and negative bias temperature instability

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, p.1-2

2014

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Characteristics of Defect Generation and Breakdown in SiO2 for Polycrystalline Silicon Channel Field-Effect Transistor

Jpn J Appl Phys, 2012-04, Vol.51 (4), p.04DA02-04DA02-5

2012

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Low Gate-Induced Drain Leakage and Its Physical Origins in Si Nanowire Transistors

Japanese Journal of Applied Physics, 2011-04, Vol.50 (4), p.04DC10-04DC10-3

2011

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Enhanced Degradation by Negative Bias Temperature Stress in Si Nanowire Transistor

Japanese Journal of Applied Physics, 2012-02, Vol.51 (2), p.02BC08-02BC08-3

2012

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Room-temperature demonstration of low-voltage and tunable static memory based on negative differential conductance in silicon single-electron transistors

Applied physics letters, 2004-12, Vol.85 (25), p.6233-6235

2004

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Guest Editorial Special Section on EDTM 2022

Low-power linear computation using nonlinear ferroelectric tunnel junction memristors

Comprehensive study of variability in poly-Si channel nanowire transistor

Experimental Study of Random Telegraph Noise in Trigate Nanowire MOSFETs

Threshold Voltage Control by Substrate Bias in 10-nm-Diameter Tri-Gate Nanowire MOSFET on Ultrathin BOX

Toe Clearance Rehabilitative Slippers for Older Adults With Fall Risk: A Randomized Controlled Trial

Probing spatial heterogeneity in silicon thin films by Raman spectroscopy

Individual analysis of inter and intragrain defects in electrically characterized polycrystalline silicon nanowire TFTs by multicomponent dark-field imaging based on nanobeam electron diffraction two-dimensional mapping

Experimental Study of Self-Heating Effects in Trigate Nanowire MOSFETs Considering Device Geometry

Experimental study of time-dependent dielectric breakdown in tri-gate nanowire transistor

Extension of Coulomb blockade region by quantum confinement in the ultrasmall silicon dot in a single-hole transistor at room temperature

Channel size dependence of low-frequency noise in tri-gate silicon nanowire transistors

Physical mechanism of source and drain resistance reduction for high-performance short-channel InGaZnO thin-film transistors

Hole mobility enhancement by double-gate mode in ultrathin-body silicon-on-insulator p -type metal-oxide-semiconductor field-effect transistors

SPICE-Based Performance Analysis of Trigate Silicon Nanowire CMOS Circuits

Voltage gain dependence of the negative differential conductance width in silicon single-hole transistors

Large memory window and long charge-retention time in ultranarrow-channel silicon floating-dot memory

Physical Origins of Threshold Voltage Variation Enhancement in Si(110) n/pMOSFETs

Experimental study of uniaxial stress effects on Coulomb-limited mobility in p -type metal-oxide-semiconductor field-effect transistors

One-to-one correspondence between nm-resolution channel crystallinity and electrical property of poly-Si TFT revealed by NBD two-dimensional imaging

Systematic study of RTN in nanowire transistor and enhanced RTN by hot carrier injection and negative bias temperature instability

Characteristics of Defect Generation and Breakdown in SiO2 for Polycrystalline Silicon Channel Field-Effect Transistor

Low Gate-Induced Drain Leakage and Its Physical Origins in Si Nanowire Transistors

Enhanced Degradation by Negative Bias Temperature Stress in Si Nanowire Transistor

Room-temperature demonstration of low-voltage and tunable static memory based on negative differential conductance in silicon single-electron transistors

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