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Dynamic power-aware scheduling of real-time tasks for FPGA-based cyber physical systems against power draining hardware trojan attacks

The Journal of supercomputing, 2020-11, Vol.76 (11), p.8972-9009

2020

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One-Dimensional Lazy Quantum Walk in Ternary System

IEEE transactions on quantum engineering, 2021, Vol.2, p.1-12

2021

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SoC: A Real Platform for IP Reuse, IP Infringement, and IP Protection

VLSI Design, 2011, Vol.2011, p.1-10

2011

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Guided GA-Based Multiobjective Optimization of Placement and Assignment of TSVs in 3-D ICs

IEEE transactions on very large scale integration (VLSI) systems, 2019-08, Vol.27 (8), p.1742-1750

2019

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Minimization of WCRT with Recovery Assurance from Hardware Trojans for Tasks on FPGA-based Cloud

ACM transactions on embedded computing systems, 2021-01, Vol.20 (1), p.1-25

2021

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Moving quantum states without swap via intermediate higher-dimensional qudits

Physical review. A, 2022-07, Vol.106 (1), Article 012429

2022

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Adaptive Multilayer Routing for Incremental Design of an SoC

Proceedings of the 4th International Conference on Frontiers in Intelligent Computing: Theory and Applications (FICTA) 2015, p.657-665

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Secure Public Verification of IP Marks in FPGA Design Through a Zero-Knowledge Protocol

IEEE transactions on very large scale integration (VLSI) systems, 2012-10, Vol.20 (10), p.1749-1757

2012

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Circuit Design for k-Coloring Problem and Its Implementation in Any Dimensional Quantum System

SN computer science, 2021-11, Vol.2 (6), p.427, Article 427

2021

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Watermarking in Hard Intellectual Property for Pre-Fab and Post-Fab Verification

IEEE transactions on very large scale integration (VLSI) systems, 2015-05, Vol.23 (5), p.801-809

2015

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Faster search of clustered marked states with lackadaisical quantum walks

Quantum information processing, 2022-08, Vol.21 (8), Article 275

2022

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Asymptotically improved circuit for a d -ary Grover's algorithm with advanced decomposition of the n -qudit Toffoli gate

Physical review. A, 2022-06, Vol.105 (6), Article 062453

2022

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Stigmergy-Based Security for SoC Operations From Runtime Performance Degradation of SoC Components

ACM transactions on embedded computing systems, 2019-04, Vol.18 (2), p.1-26

2019

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FPGA based dual microphone speech enhancement

Microsystem technologies : sensors, actuators, systems integration, 2019-03, Vol.25 (3), p.765-775

2019

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A Multi-Agent Co-operative Model to Facilitate Criticality based Reliability for Mixed Critical Task Execution on FPGA based Cloud Environment

2020 33rd International Conference on VLSI Design and 2020 19th International Conference on Embedded Systems (VLSID), 2020, p.143-148

2020

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GreyConE: Greybox Fuzzing + Concolic Execution Guided Test Generation for High Level Designs

2022 IEEE International Test Conference (ITC), 2022, p.494-498

2022

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Blockchain technology enabled pay per use licensing approach for hardware IPs

Proceedings of the 23rd Conference on Design, Automation and Test in Europe, 2020, p.1618-1621

2020

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Criticality based reliability against hardware Trojan attacks for processing of tasks on reconfigurable hardware

Microprocessors and microsystems, 2019-11, Vol.71, p.102865, Article 102865

2019

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Blockchain Technology Enabled Pay Per Use Licensing Approach for Hardware IPs

2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2020, p.1618-1621

2020

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Real-Time SoC Security against Passive Threats Using Crypsis Behavior of Geckos

ACM journal on emerging technologies in computing systems, 2017-07, Vol.13 (3), p.1-26

2017

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Multi-objective Optimization of Placement and Assignment of TSVs in 3D ICs

2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID), 2017, p.372-377

2017

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A CAD approach for pre-layout optimal PDN design and its post-layout verification

Microprocessors and microsystems, 2019-03, Vol.65, p.158-168

2019

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Self Aware SoC Security to Counteract Delay Inducing Hardware Trojans at Runtime

2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID), 2017, p.417-422

2017

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A Resilient Authentication and Trojan Detection Technique for Hard IP

Procedia technology, 2012, Vol.6, p.24-30

Saha, Debasri

2012

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Coherence based dual microphone speech enhancement technique using FPGA

Microprocessors and microsystems, 2017-11, Vol.55, p.111-118

2017

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Dynamic power-aware scheduling of real-time tasks for FPGA-based cyber physical systems against power draining hardware trojan attacks

One-Dimensional Lazy Quantum Walk in Ternary System

SoC: A Real Platform for IP Reuse, IP Infringement, and IP Protection

Guided GA-Based Multiobjective Optimization of Placement and Assignment of TSVs in 3-D ICs

Minimization of WCRT with Recovery Assurance from Hardware Trojans for Tasks on FPGA-based Cloud

Moving quantum states without swap via intermediate higher-dimensional qudits

Adaptive Multilayer Routing for Incremental Design of an SoC

Secure Public Verification of IP Marks in FPGA Design Through a Zero-Knowledge Protocol

Circuit Design for k-Coloring Problem and Its Implementation in Any Dimensional Quantum System

Watermarking in Hard Intellectual Property for Pre-Fab and Post-Fab Verification

Faster search of clustered marked states with lackadaisical quantum walks

Asymptotically improved circuit for a d -ary Grover's algorithm with advanced decomposition of the n -qudit Toffoli gate

Stigmergy-Based Security for SoC Operations From Runtime Performance Degradation of SoC Components

FPGA based dual microphone speech enhancement

A Multi-Agent Co-operative Model to Facilitate Criticality based Reliability for Mixed Critical Task Execution on FPGA based Cloud Environment

GreyConE: Greybox Fuzzing + Concolic Execution Guided Test Generation for High Level Designs

Blockchain technology enabled pay per use licensing approach for hardware IPs

Criticality based reliability against hardware Trojan attacks for processing of tasks on reconfigurable hardware

Blockchain Technology Enabled Pay Per Use Licensing Approach for Hardware IPs

Real-Time SoC Security against Passive Threats Using Crypsis Behavior of Geckos

Multi-objective Optimization of Placement and Assignment of TSVs in 3D ICs

A CAD approach for pre-layout optimal PDN design and its post-layout verification

Self Aware SoC Security to Counteract Delay Inducing Hardware Trojans at Runtime

A Resilient Authentication and Trojan Detection Technique for Hard IP

Coherence based dual microphone speech enhancement technique using FPGA

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