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Reduction of Copper Oxide Film to Elemental Copper

Journal of the Electrochemical Society, 2005, Vol.152 (2), p.G122

2005

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Atomic layer deposition of WxN/TiN and WNxCy/TiN nanolaminates

Thin solid films, 2003-06, Vol.434 (1-2), p.94-99

2003

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Diffusion Barrier Deposition on a Copper Surface by Atomic Layer Deposition

Chemical vapor deposition, 2002-07, Vol.8 (4), p.149-153

2002

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A network on chip architecture and design methodology

IEEE Computer Society Annual Symposium on VLSI, 2002, p.117-124

2002

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Minimisation of functionality and implementation of embedded low-power WWW-server

Electronics letters, 2002-01, Vol.38 (2), p.100-101

2002

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Perfectly Conformal TiN and Al2O3 Films Deposited by Atomic Layer Deposition

Chemical vapor deposition, 1999-01, Vol.5 (1), p.7-9

1999

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ALE-reactor for large area depositions

Applied surface science, 1997-03, Vol.112, p.251-254

1997

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Estimating the utilization of embedded FPGA co-processor

Euromicro Symposium on Digital System Design, 2003. Proceedings, 2003, p.214-221

2003

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Extending platform-based design to network on chip systems

16th International Conference on VLSI Design, 2003. Proceedings, 2003, p.401-408

2003

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Picosun SUNALE ALD Systems for High Quality Nanocoatings - Bridging the Gap between R&D and Industrial Production

ECS transactions, 2011, Vol.41 (2), p.187-193

2011

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Mappability estimation of architecture and algorithm

Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 04-08 Mar. 2002, 2002, p.1132

2002

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Application of decision-making method for architecture selection of ADSL modem

Proceedings Euromicro Symposium on Digital Systems Design, 2001, p.21-28

2001

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A Parallel Configuration Model for Reducing the Run-Time Reconfiguration Overhead

Proceedings of the Design Automation & Test in Europe Conference, 2006, Vol.1, p.1-6

2006

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Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking

2008 Design, Automation and Test in Europe, 2008, p.264-267

2008

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Configurable memory organisation for communication applications

Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools, 2002, p.86-93

2002

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Minimisation of functionality and implementation of embedded low-power WWW-server

Electronics letters, 2002-01, Vol.38 (2), p.1-1

2002

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SystemC-based design methodology for reconfigurable system-on-chip

8th Euromicro Conference on Digital System Design (DSD'05), 2005, p.364-371

2005

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Providing network connectivity for small appliances: a functionally minimized embedded Web server

IEEE communications magazine, 2001-10, Vol.39 (10), p.74-79

2001

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Evaluating application mapping using network simulation

Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748), 2003, p.27-30

2003

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Mappability estimate: a measure of the goodness of a processor-algorithm pair

Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748), 2003, p.119-122

2003

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Evaluation of platform architecture performance using abstract instruction-level workload models

2004 International Symposium on System-on-Chip, 2004. Proceedings, 2004, p.43-48

2004

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Fast processor core selection for WLAN modem using mappability estimation

International Conference on Hardware Software Codesign: Proceedings of the tenth international symposium on Hardware/software codesign; 06-08 May 2002, 2002, p.61-66

2002

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Deposition of Cu barrier and seed layers with atomic layer control

Proceedings of the IEEE 2002 International Interconnect Technology Conference (Cat. No.02EX519), 2002, p.279-281

2002

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Cosimulation of real-time control systems

Proceedings of EURO-DAC. European Design Automation Conference, 1995, p.170-175

1995

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Linking GENESYS application architecture modelling with platform performance simulation

2009 Forum on Specification & Design Languages (FDL), 2009, p.1-6

2009

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Reduction of Copper Oxide Film to Elemental Copper

Atomic layer deposition of WxN/TiN and WNxCy/TiN nanolaminates

Diffusion Barrier Deposition on a Copper Surface by Atomic Layer Deposition

A network on chip architecture and design methodology

Minimisation of functionality and implementation of embedded low-power WWW-server

Perfectly Conformal TiN and Al2O3 Films Deposited by Atomic Layer Deposition

ALE-reactor for large area depositions

Estimating the utilization of embedded FPGA co-processor

Extending platform-based design to network on chip systems

Picosun SUNALE ALD Systems for High Quality Nanocoatings - Bridging the Gap between R&D and Industrial Production

Mappability estimation of architecture and algorithm

Application of decision-making method for architecture selection of ADSL modem

A Parallel Configuration Model for Reducing the Run-Time Reconfiguration Overhead

Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking

Configurable memory organisation for communication applications

Minimisation of functionality and implementation of embedded low-power WWW-server

SystemC-based design methodology for reconfigurable system-on-chip

Providing network connectivity for small appliances: a functionally minimized embedded Web server

Evaluating application mapping using network simulation

Mappability estimate: a measure of the goodness of a processor-algorithm pair

Evaluation of platform architecture performance using abstract instruction-level workload models

Fast processor core selection for WLAN modem using mappability estimation

Deposition of Cu barrier and seed layers with atomic layer control

Cosimulation of real-time control systems

Linking GENESYS application architecture modelling with platform performance simulation

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