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Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers

IEEE transactions on very large scale integration (VLSI) systems, 2008-06, Vol.16 (6), p.639-649

2008

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Meta-analysis of Correlated Traits via Summary Statistics from GWASs with an Application in Hypertension

American journal of human genetics, 2015-01, Vol.96 (1), p.21-36

2015

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Gene-centric meta-analyses of 108 912 individuals confirm known body mass index loci and reveal three novel signals

Human molecular genetics, 2013-01, Vol.22 (1), p.184-201

2013

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Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 2006, p.214-224

2006

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Timing-driven row-based power gating

International Symposium on Low Power Electronics and Design: Proceedings of the 2007 international symposium on Low power electronics and design; 27-29 Aug. 2007, 2007, p.104-109

2007

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Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating

Journal of low-power electronics, 2009-04, Vol.5 (1), p.113-121

2009

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Implementation of a thermal management unit for canceling temperature-dependent clock skew variations

Integration (Amsterdam), 2008, Vol.41 (1), p.2-8

2008

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The relationship between birthweight and longitudinal changes of blood pressure is modulated by beta-adrenergic receptor genes: the Bogalusa Heart Study

BioMed research international, 2010-01, Vol.2010, p.543514-8

2010

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The association of the vanin-1 N131S variant with blood pressure is mediated by endoplasmic reticulum-associated degradation and loss of function

PLoS genetics, 2014-09, Vol.10 (9), p.e1004641-e1004641

2014

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Thermal-Aware Design Techniques for Nanometer CMOS Circuits

Journal of low-power electronics, 2008-12, Vol.4 (3), p.374-384

2008

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Dynamic thermal clock skew compensation using tunable delay buffers

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, p.162-167

2006

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Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits

IEEE transactions on very large scale integration (VLSI) systems, 2011-03, Vol.19 (3), p.469-482

2011

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On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits

2008 IEEE International Symposium on Circuits and Systems, 2008, p.2761-2764

2008

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A Hierarchical Electromagnetic-Circuit Technique for Statistical Analysis of RF Circuits in the Spectral Domain

IEEE transactions on microwave theory and techniques, 2009-04, Vol.57 (4), p.796-806

2009

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Automatic identification of variables in epidemiological datasets using logic regression

BMC medical informatics and decision making, 2017-04, Vol.17 (1), p.40-40, Article 40

2017

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Design strategies for high-dimensional electromagnetic systems

2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2012, p.498-498

2012

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Fast Computation of Discharge Current Upper Bounds for Clustered Power Gating

IEEE transactions on very large scale integration (VLSI) systems, 2011-01, Vol.19 (1), p.146-151

2011

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Physically clustered forward body biasing for variability compensation in nanometer CMOS design

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009, p.154-159

2009

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Accurate statistical analysis of a differential low noise amplifier using a combined SPICE-field solver approach

2008 IEEE International Symposium on Circuits and Systems, 2008, p.884-887

2008

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Efficient Computation of Discharge Current Upper Bounds for Clustered Sleep Transistor Sizing

2007 Design, Automation & Test in Europe Conference & Exhibition, 2007, p.1-6

2007

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Implementation of a thermal management unit for canceling temperature-dependent clock skew variations : Power and timing modeling, optimization simulation

Integration (Amsterdam), 2008, Vol.41 (1), p.2-8

2008

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A Scalable Algorithmic Framework for Row-Based Power-Gating

2008 Design, Automation and Test in Europe, 2008, p.379-384

2008

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Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.1061-1064

2007

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Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits

2006 IEEE International Symposium on Circuits and Systems (ISCAS), 2006, p.4 pp.-36

2006

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Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers

Carotid intima-media thickness progression to predict cardiovascular events in the general population (the PROG-IMT collaborative project): a meta-analysis of individual participant data

Meta-analysis of Correlated Traits via Summary Statistics from GWASs with an Application in Hypertension

Gene-centric meta-analyses of 108 912 individuals confirm known body mass index loci and reveal three novel signals

Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective

Timing-driven row-based power gating

Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating

Implementation of a thermal management unit for canceling temperature-dependent clock skew variations

The relationship between birthweight and longitudinal changes of blood pressure is modulated by beta-adrenergic receptor genes: the Bogalusa Heart Study

The association of the vanin-1 N131S variant with blood pressure is mediated by endoplasmic reticulum-associated degradation and loss of function

Thermal-Aware Design Techniques for Nanometer CMOS Circuits

Dynamic thermal clock skew compensation using tunable delay buffers

Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits

On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits

A Hierarchical Electromagnetic-Circuit Technique for Statistical Analysis of RF Circuits in the Spectral Domain

Automatic identification of variables in epidemiological datasets using logic regression

Design strategies for high-dimensional electromagnetic systems

Fast Computation of Discharge Current Upper Bounds for Clustered Power Gating

Physically clustered forward body biasing for variability compensation in nanometer CMOS design

Accurate statistical analysis of a differential low noise amplifier using a combined SPICE-field solver approach

Efficient Computation of Discharge Current Upper Bounds for Clustered Sleep Transistor Sizing

Implementation of a thermal management unit for canceling temperature-dependent clock skew variations : Power and timing modeling, optimization simulation

A Scalable Algorithmic Framework for Row-Based Power-Gating

Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew

Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits

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