UB Paderborn / Katalog / Suche / in CDI

1 – 20 von 20

Sortiert nach

A high-speed 128-kb MRAM core for future universal memory applications

IEEE journal of solid-state circuits, 2004-04, Vol.39 (4), p.678-683

2004

Volltextzugriff (PDF)

A 10ns read and write non-volatile memory array using a magnetic tunnel junction and FET switch in each cell

Digest of technical papers - IEEE International Solid-State Circuits Conference, 2000

2000

Volltextzugriff (PDF)

Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications

IEEE MICRO, 2008-11, Vol.28 (6), p.47-56

2008

Volltextzugriff (PDF)

Asynchronous interlocked pipelined CMOS circuits operating at 3.3-4.5Ghz

Digest of technical papers - IEEE International Solid-State Circuits Conference, 2000

2000

Volltextzugriff (PDF)

A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier

IEEE journal of solid-state circuits, 2008-01, Vol.43 (1), p.86-95

2008

Volltextzugriff (PDF)

Memories of tomorrow

IEEE circuits and devices magazine, 2002-09, Vol.18 (5), p.17-27

2002

Volltextzugriff (PDF)

A 1 MB Cache Subsystem Prototype With 1.8 ns Embedded DRAMs in 45 nm SOI CMOS

IEEE journal of solid-state circuits, 2009-04, Vol.44 (4), p.1216-1226

2009

Volltextzugriff (PDF)

A 45nm SOI embedded DRAM macro for POWER7TM 32MB on-chip L3 cache

2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010, p.342-343

2010

Volltextzugriff (PDF)

An on-chip dual supply charge pump system for 45nm PD SOI eDRAM

ESSCIRC 2008 - 34th European Solid-State Circuits Conference, 2008, p.66-69

2008

Volltextzugriff (PDF)

Ratioed CMOS: a low power high speed design choice in SOI technologies

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125), 2000, p.28-29

2000

Volltextzugriff (PDF)

A 10 ns read and write non-volatile memory array using a magnetic tunnel junction and FET switch in each cell

2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), 2000, p.128-129

2000

Volltextzugriff (PDF)

Asynchronous interlocked pipelined CMOS circuits operating at 3.3-4.5 GHz

2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), 2000, p.292-293

2000

Volltextzugriff (PDF)

Statistical yield analysis of silicon-on-insulator embedded DRAM

2009 10th International Symposium on Quality Electronic Design, 2009, p.190-194

2009

Volltextzugriff (PDF)

A one MB cache subsystem prototype with 2GHz embedded DRAMs in 45nm SOI CMOS

2008 IEEE Symposium on VLSI Circuits, 2008, p.206-207

2008

Volltextzugriff (PDF)

Bipolar, CMOS and BiCMOS circuit technologies examined for testability

[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems, 1991, p.1015-1020 vol.2

1991

Volltextzugriff (PDF)

Current bias testing of differential circuits

Proceedings of the IEEE 1991 Custom Integrated Circuits Conference, 1991, p.17.6/1-17.6/4

1991

Volltextzugriff (PDF)

Design SRAMs for burn-in

Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium, 1993, p.164-170

1993

Volltextzugriff (PDF)

A high-speed 128 Kbit MRAM core for future universal memory applications

2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408), 2003, p.217-220

2003

Volltextzugriff (PDF)

Precharged Cache Hit Logic With Flexible Timing Control

Symposium 1997 on VLSI Circuits, 1997, p.43-44

1997

Volltextzugriff (PDF)

Genus beta human papillomaviruses and incidence of basal cell and squamous cell carcinomas of skin: population based case-control study

BMJ (Online), 2010-07, Vol.341, p.c2986

2010

Volltextzugriff (PDF)

1 – 20 von 20

Suche als RSS-Feed

Suchergebnisse filtern

Filter anzeigen

Nur zeigen

Geprüft (Peer-Review)
(7)
Mit Volltextzugriff
(19)

Publikationsform

Tagungsberichte
(14)
Artikel
(6)

Sprache

Englisch
(20)
Japanisch
(1)

Erscheinungsjahr

n.n

Thema

Random Access Memory
(11)
Science & Technology
(8)
Technology
(7)
Engineering
(6)
Engineering, Electrical & Electronic
(6)
Circuit Testing
(5)
Circuits
(5)
Clocks
(5)
Cmos Technology
(5)
Delay
(4)
Switching Circuits
(4)
Arrays
(3)
Built-In Self-Test
(3)
Capacitance
(3)
Circuit Noise
(3)
Logic
(3)
Logic Devices
(3)
Logic Testing
(3)
Microprocessors
(3)
Silicon On Insulator Technology
(3)

15 weitere anzeigen...

Weniger anzeigen...

Kollektion

1 weiteren anzeigen...

Weniger anzeigen...

Zeitschrift / Serie

Ieee Journal Of Solid-State Circuits
(3)
Bmj
(1)
British Medical Journal
(1)
Ebmj
(1)
Ieee Circuits And Devices Magazine
(1)
Ieee Micro
(1)

1 weiteren anzeigen...

Weniger anzeigen...

Menü

Weitere Dienste

Einstellungen

A high-speed 128-kb MRAM core for future universal memory applications

A 10ns read and write non-volatile memory array using a magnetic tunnel junction and FET switch in each cell

Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications

Asynchronous interlocked pipelined CMOS circuits operating at 3.3-4.5Ghz

A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier

Memories of tomorrow

A 1 MB Cache Subsystem Prototype With 1.8 ns Embedded DRAMs in 45 nm SOI CMOS

A 45nm SOI embedded DRAM macro for POWER7TM 32MB on-chip L3 cache

An on-chip dual supply charge pump system for 45nm PD SOI eDRAM

Ratioed CMOS: a low power high speed design choice in SOI technologies

A 10 ns read and write non-volatile memory array using a magnetic tunnel junction and FET switch in each cell

Asynchronous interlocked pipelined CMOS circuits operating at 3.3-4.5 GHz

Statistical yield analysis of silicon-on-insulator embedded DRAM

A one MB cache subsystem prototype with 2GHz embedded DRAMs in 45nm SOI CMOS

Bipolar, CMOS and BiCMOS circuit technologies examined for testability

Current bias testing of differential circuits

Design SRAMs for burn-in

A high-speed 128 Kbit MRAM core for future universal memory applications

Precharged Cache Hit Logic With Flexible Timing Control

Genus beta human papillomaviruses and incidence of basal cell and squamous cell carcinomas of skin: population based case-control study

Suchergebnisse filtern