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A Multiresolution Time Domain (MRTD) Method for Crosstalk Noise Modeling of CMOS-Gate-Driven Coupled MWCNT Interconnects

IEEE transactions on electromagnetic compatibility, 2020-04, Vol.62 (2), p.521-531

2020

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A novel hybrid series stacked differential fractal inductor for MMIC applications

Circuit world, 2020-04, Vol.46 (2), p.137-145

2020

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Analytical modeling of subthreshold current and swing of strained‐Si graded channel dual material double gate MOSFET with interface charges and analysis of circuit performance

International journal of numerical modelling, 2021-01, Vol.34 (1), p.n/a

2021

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A novel MRTD model for signal integrity analysis of resistive driven coupled copper interconnects

Compel, 2018-01, Vol.37 (1), p.189-207

2018

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High quality factor fractal inductor with complementary split-ring array inclusion

Circuit world, 2020-06, Vol.46 (3), p.215-219

2020

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Modeling and Analysis of On-Chip Single and H-tree Distributed RLC Interconnects

Circuits, systems, and signal processing, 2016-09, Vol.35 (9), p.3049-3065

2016

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An analytical drain current modelling of DMGC CGAA FET: A circuit level implementation

Physica scripta, 2023-11, Vol.98 (11), p.115008

2023

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Analytical modeling of a dual-material graded-channel cylindrical gate-all-around FET to minimize the short-channel effects

Journal of computational electronics, 2023-02, Vol.22 (1), p.199-208

2023

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The analog/RF performance of a strained-Si graded-channel dual-material double-gate MOSFET with interface charges

Journal of computational electronics, 2021-02, Vol.20 (1), p.492-502

2021

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Analog/RF Performance of Graded Channel Gate Stack Triple Material Double Gate Strained-Si MOSFET with Fixed Charges

SILICON, 2022-04, Vol.14 (6), p.2741-2756

2022

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Variability analysis of a graded-channel dual-material double-gate strained-silicon MOSFET with fixed charges

Journal of computational electronics, 2022-02, Vol.21 (1), p.243-252

2022

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A center-potential-based threshold voltage model for a graded-channel dual-material double-gate strained-Si MOSFET with interface charges

Journal of computational electronics, 2019-12, Vol.18 (4), p.1173-1181

2019

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A 16Gbps 3rd Order CTLE Design for Serial Links with High Channel Loss in 16nm FinFET

2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID), 2023, p.284-289

2023

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An Efficient MRTD Model for the Analysis of Crosstalk in CMOS-Driven Coupled Cu Interconnects

Radioengineering, 2018-06, Vol.27 (2), p.532-540

2018

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Design of an on-chip Hilbert fractal inductor using an improved feed forward neural network for Si RFICs

Elektrik : Turkish journal of electrical engineering & computer sciences, 2018-01, Vol.26 (5), p.2437-2447

2018

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Analog/RF Performance of Triple Material Gate Stack-Graded Channel Double Gate-Junctionless Strained-silicon MOSFET with Fixed Charges

SILICON, 2022-08, Vol.14 (12), p.7363-7376

2022

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Design optimization of junctionless bottom spacer tapered FinFET: Device to circuit level implementation

Microelectronics, 2023-09, Vol.139, p.105907, Article 105907

2023

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High inductance fractal inductors for wireless applications

Elektrik : Turkish journal of electrical engineering & computer sciences, 2017, Vol.25, p.3868-3880

2017

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A High Performance Miniaturized 25 GHz Band Pass Filter Using Multilayer Split Path IPD Inductor for 5G/6G Radio Applications

2024 7th International Conference on Electronics, Communications, and Control Engineering (ICECC), 2024, p.60-65

2024

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Optimization of DMGC CGAA FET Under Heavy Ion Irradiation Environment: A Reliability Analysis

2023 IEEE 20th India Council International Conference (INDICON), 2023, p.1018-1023

2023

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Performance Analysis of Dual Material Graded Channel Cylindrical Gate All Around (DMGC CGAA) FET with Source/Drain Underlap

2022 IEEE International Symposium on Smart Electronic Systems (iSES), 2022, p.302-306

2022

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Simulation and Performance Analysis of Hetero Dielectric Underlap Asymmetrical Double-Gate MOSFET Using Gate Stack

2021 IEEE 18th India Council International Conference (INDICON), 2021, p.1-6

2021

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A Compact Low Loss Onchip Bandpass Filter For 5G Radio Front End Using Integrated Passive Device Technology

2019 Third International conference on I-SMAC (IoT in Social, Mobile, Analytics and Cloud) (I-SMAC), 2019, p.649-654

2019

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A Low-Power Third-Order Passive Continuous-Time Sigma-Delta Modulator Using FinFET

Electronic Systems and Intelligent Computing, 2020, Vol.686, p.395-405

2020

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A High Performance Miniaturized onchip 25 GHz Narrow Bandpass Filter for 5G Radio Access Applications

2019 4th International Conference and Workshops on Recent Advances and Innovations in Engineering (ICRAIE), 2019, p.1-5

2019

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A Multiresolution Time Domain (MRTD) Method for Crosstalk Noise Modeling of CMOS-Gate-Driven Coupled MWCNT Interconnects

A novel hybrid series stacked differential fractal inductor for MMIC applications

Analytical modeling of subthreshold current and swing of strained‐Si graded channel dual material double gate MOSFET with interface charges and analysis of circuit performance

A novel MRTD model for signal integrity analysis of resistive driven coupled copper interconnects

High quality factor fractal inductor with complementary split-ring array inclusion

Modeling and Analysis of On-Chip Single and H-tree Distributed RLC Interconnects

An analytical drain current modelling of DMGC CGAA FET: A circuit level implementation

Analytical modeling of a dual-material graded-channel cylindrical gate-all-around FET to minimize the short-channel effects

The analog/RF performance of a strained-Si graded-channel dual-material double-gate MOSFET with interface charges

Analog/RF Performance of Graded Channel Gate Stack Triple Material Double Gate Strained-Si MOSFET with Fixed Charges

Variability analysis of a graded-channel dual-material double-gate strained-silicon MOSFET with fixed charges

A center-potential-based threshold voltage model for a graded-channel dual-material double-gate strained-Si MOSFET with interface charges

A 16Gbps 3rd Order CTLE Design for Serial Links with High Channel Loss in 16nm FinFET

An Efficient MRTD Model for the Analysis of Crosstalk in CMOS-Driven Coupled Cu Interconnects

Design of an on-chip Hilbert fractal inductor using an improved feed forward neural network for Si RFICs

Analog/RF Performance of Triple Material Gate Stack-Graded Channel Double Gate-Junctionless Strained-silicon MOSFET with Fixed Charges

Design optimization of junctionless bottom spacer tapered FinFET: Device to circuit level implementation

High inductance fractal inductors for wireless applications

A High Performance Miniaturized 25 GHz Band Pass Filter Using Multilayer Split Path IPD Inductor for 5G/6G Radio Applications

Optimization of DMGC CGAA FET Under Heavy Ion Irradiation Environment: A Reliability Analysis

Performance Analysis of Dual Material Graded Channel Cylindrical Gate All Around (DMGC CGAA) FET with Source/Drain Underlap

Simulation and Performance Analysis of Hetero Dielectric Underlap Asymmetrical Double-Gate MOSFET Using Gate Stack

A Compact Low Loss Onchip Bandpass Filter For 5G Radio Front End Using Integrated Passive Device Technology

A Low-Power Third-Order Passive Continuous-Time Sigma-Delta Modulator Using FinFET

A High Performance Miniaturized onchip 25 GHz Narrow Bandpass Filter for 5G Radio Access Applications

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