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Low power low area VLSI implementation of adaptive FIR filter using DA for decision feed back equalizer

Microprocessors and microsystems, 2022-09, Vol.93, p.104577, Article 104577

2022

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Improvement in the Quality of Services in Sub-6 GHz/mm Wave Using Equalizers and Decoupling of UL and DL with Machine Learning Approach

Journal of communications, 2023-09, p.599-607

2023

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A Novel Hybrid Weighted Method-Based Beamforming for Sidelobe Level Reduction in Radar Applications

Arabian journal for science and engineering (2011), 2022-11, Vol.47 (11), p.14133-14145

2022

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High performance area efficient DA based FIR filter for concurrent decision feedback equalizer

International journal of speech technology, 2020-06, Vol.23 (2), p.297-303

2020

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Design of reliable and fast Schmitt trigger 10T SRAM cells using in-memory computing

Engineering Research Express, 2024-12, Vol.6 (4), p.45314

2024

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Proffering Secure Energy Aware Network-On-Chip (Noc) Using Incremental Cryptogine

Sustainable computing informatics and systems, 2022-09, Vol.35, p.100682, Article 100682

2022

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Design and implementation of hybrid logic based MAC unit using 45 nm technology

e-Prime, 2023-12, Vol.6, p.100317, Article 100317

2023

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Prediction of Intermittent Failure by Presage Debacle Model in Network on Chip

International journal of computer network and information security, 2022-08, Vol.14 (4), p.75-88

2022

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Design and Analysis of a Novel Low Complexity and Low Power Ping Lock Arbiter by using EGDI based CMOS Technique

International Journal of Integrated Engineering, 2022-01, Vol.14 (1)

2022

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A Watermark Approach for Image Transmission: Implementation of Channel Coding Technique with Security

Turkish journal of computer and mathematics education, 2021-04, Vol.12 (3), p.3976-3984

Et.al, G.Aparna

2021

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An approach for Secured Image Transmission: A High Capacitive and Confidentiality based Image Steganography using Private Stego-Key

Turkish journal of computer and mathematics education, 2021-04, Vol.12 (3), p.4190-4201

Et.al, G.Aparna

2021

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Analysis of crosstalk noise in coupled MWCNT interconnects using MRTD technique

Microsystem technologies : sensors, actuators, systems integration, 2024-11, Vol.30 (11), p.1501-1514

2024

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FPGA implementation of polar codes for 5G eMBB control channels

International journal of ultra wideband communications and systems, 2021, Vol.4 (3/4), p.170

2021

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Object Tracking using Motion Estimation based on Block Matching Algorithm

2020 International Conference on Inventive Computation Technologies (ICICT), 2020, p.519-522

2020

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High Speed Low Area DA Based FIR Filter Using EGDI Adder

International Journal of Integrated Engineering, 2022-12, Vol.14 (7)

2022

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Performance Analysis of MIMO Detection Algorithms with BPSK and PAM Modulation

International journal of recent technology and engineering, 2022-11, Vol.11 (4), p.23-28

2022

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Design and Analysis of Low Power Hybrid Logic Adder for Signal Processing Applications

International Journal of Electrical and Electronics Engineering, 2023-10, Vol.10 (10), p.197-206

2023

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RETRACTED: Design and implementation of network‐on‐chip router using multi‐priority based iterative round‐robin matching with slip

Transactions on emerging telecommunications technologies, 2024-10, Vol.35 (10), p.n/a

2024

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Identification of intra pulse modulation signal in the presence of noise

ARPN journal of engineering and applied sciences, 2024-01, p.2445-2454

2024

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Enhancing multi-target detection in low SNR conditions

Aerospace systems (Online), 2024-07

2024

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Modeling of Capacitive Coupled Interconnects for Crosstalk Analysis in High Speed VLSI Circuits

2019 International Conference on Communication and Signal Processing (ICCSP), 2019, p.0007-0011

2019

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Design of High Speed Ethernet Based Receiver Processor Unit for Radar applications

2022 4th International Conference on Advances in Computing, Communication Control and Networking (ICAC3N), 2022, p.1656-1660

2022

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An Efficent Coverage and Maximization of Network Lifetime in WSN Through Metaheuristics

International journal of informatics and communication technology, 2021-12, Vol.10 (3), p.159

2021

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Design and analysis of hybrid 10T adder for low power applications

e-Prime, 2023-12, Vol.6, p.100379, Article 100379

2023

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Object Detection Based on Faster R-Cnn

International journal of engineering and advanced technology, 2021-02, Vol.10 (3), p.72-76

2021

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Low power low area VLSI implementation of adaptive FIR filter using DA for decision feed back equalizer

Improvement in the Quality of Services in Sub-6 GHz/mm Wave Using Equalizers and Decoupling of UL and DL with Machine Learning Approach

A Novel Hybrid Weighted Method-Based Beamforming for Sidelobe Level Reduction in Radar Applications

High performance area efficient DA based FIR filter for concurrent decision feedback equalizer

Design of reliable and fast Schmitt trigger 10T SRAM cells using in-memory computing

Proffering Secure Energy Aware Network-On-Chip (Noc) Using Incremental Cryptogine

Design and implementation of hybrid logic based MAC unit using 45 nm technology

Prediction of Intermittent Failure by Presage Debacle Model in Network on Chip

Design and Analysis of a Novel Low Complexity and Low Power Ping Lock Arbiter by using EGDI based CMOS Technique

A Watermark Approach for Image Transmission: Implementation of Channel Coding Technique with Security

An approach for Secured Image Transmission: A High Capacitive and Confidentiality based Image Steganography using Private Stego-Key

Analysis of crosstalk noise in coupled MWCNT interconnects using MRTD technique

FPGA implementation of polar codes for 5G eMBB control channels

Object Tracking using Motion Estimation based on Block Matching Algorithm

High Speed Low Area DA Based FIR Filter Using EGDI Adder

Performance Analysis of MIMO Detection Algorithms with BPSK and PAM Modulation

Design and Analysis of Low Power Hybrid Logic Adder for Signal Processing Applications

RETRACTED: Design and implementation of network‐on‐chip router using multi‐priority based iterative round‐robin matching with slip

Identification of intra pulse modulation signal in the presence of noise

Enhancing multi-target detection in low SNR conditions

Modeling of Capacitive Coupled Interconnects for Crosstalk Analysis in High Speed VLSI Circuits

Design of High Speed Ethernet Based Receiver Processor Unit for Radar applications

An Efficent Coverage and Maximization of Network Lifetime in WSN Through Metaheuristics

Design and analysis of hybrid 10T adder for low power applications

Object Detection Based on Faster R-Cnn

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