UB Paderborn / Katalog / Suche / in CDI

Improving power output for vibration-based energy scavengers

IEEE pervasive computing, 2005-01, Vol.4 (1), p.28-36

2005

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IEEE_Xplore

PicoRadio supports ad hoc ultra-low power wireless networking

Computer (Long Beach, Calif.), 2000-07, Vol.33 (7), p.42-48

2000

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IEEE_Xplore

System-level design: orthogonalization of concerns and platform-based design

IEEE transactions on computer-aided design of integrated circuits and systems, 2000-12, Vol.19 (12), p.1523-1543

2000

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IEEE_Xplore

A 300- mu W 1.9-GHz CMOS oscillator utilizing micromachined resonators

IEEE journal of solid-state circuits, 2003-07, Vol.38 (7)

2003

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Low-swing on-chip signaling techniques: effectiveness and robustness

IEEE transactions on very large scale integration (VLSI) systems, 2000-06, Vol.8 (3), p.264-272

2000

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IEEE_Xplore

Scheduling of DSP programs onto multiprocessors for maximum throughput

IEEE transactions on signal processing, 1993-06, Vol.41 (6), p.2225-2235

1993

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IEEE_Xplore

A 0.25 V 460 nW Asynchronous Neural Signal Processor With Inherent Leakage Suppression

IEEE journal of solid-state circuits, 2013-04, Vol.48 (4), p.897-906

2013

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IEEE_Xplore

Architectural power analysis: The dual bit type method

IEEE transactions on very large scale integration (VLSI) systems, 1995-06, Vol.3 (2), p.173-187

1995

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IEEE_Xplore

An Ultra-Low-Power Injection Locked Transmitter for Wireless Sensor Networks

IEEE journal of solid-state circuits, 2006-08, Vol.41 (8), p.1740-1748

2006

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IEEE_Xplore

Algorithm selection: a quantitative optimization-intensive approach

IEEE transactions on computer-aided design of integrated circuits and systems, 1999-05, Vol.18 (5), p.524-532

1999

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IEEE_Xplore

Limitations and challenges of computer-aided design technology for CMOS VLSI

Proceedings of the IEEE, 2001-03, Vol.89 (3), p.341-365

2001

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IEEE_Xplore

Energy aware routing for low energy ad hoc sensor networks

2002 IEEE Wireless Communications and Networking Conference Record. WCNC 2002 (Cat. No.02TH8609), 2002, Vol.1, p.350-355 vol.1

2002

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IEEE_Xplore

Analysis of multidimensional DSP specifications

IEEE transactions on signal processing, 1996-12, Vol.44 (12), p.3169-3174

1996

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IEEE_Xplore

A 1V heterogeneous reconfigurable processor IC for baseband wireless applications

Digest of technical papers - IEEE International Solid-State Circuits Conference, 2000

2000

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Performance optimization using template mapping for datapath-intensive high-level synthesis

IEEE transactions on computer-aided design of integrated circuits and systems, 1996-08, Vol.15 (8), p.877-888

1996

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IEEE_Xplore

A 0.013 }^, 5 \mu\hbox , DC-Coupled Neural Signal Acquisition IC With 0.5 V Supply

IEEE journal of solid-state circuits, 2012-01, Vol.47 (1), p.232-243

2012

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IEEE_Xplore

Design of Wireless Links to Implanted Brain-Machine Interface Microelectronic Systems

IEEE antennas and wireless propagation letters, 2012, Vol.11, p.1663-1666

2012

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IEEE_Xplore

Design methodology for PicoRadio networks

Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001, 2001, p.314-323

2001

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IEEE_Xplore

A Fully-Integrated, Miniaturized (0.125 mm²) 10.5 µW Wireless Neural Sensor

IEEE journal of solid-state circuits, 2013-04, Vol.48 (4), p.960-970

2013

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IEEE_Xplore

Brain-machine interfaces as the new frontier in extreme miniaturization

2011 Proceedings of the ESSCIRC (ESSCIRC), 2011, p.19-24

Rabaey, J. M.

2011

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IEEE_Xplore

An integrated CAD system for algorithm-specific IC design

IEEE transactions on computer-aided design of integrated circuits and systems, 1991-04, Vol.10 (4), p.447-463

1991

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IEEE_Xplore

Brain-machine interfaces as the new frontier in extreme miniaturization

2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC), 2011, p.19-24

Rabaey, J. M.

2011

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IEEE_Xplore

A reconfigurable multiprocessor IC for rapid prototyping of algorithmic-specific high-speed DSP data paths

IEEE journal of solid-state circuits, 1992-12, Vol.27 (12), p.1895-1904

1992

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IEEE_Xplore

Maximally and arbitrarily fast implementation of linear and feedback linear computations

IEEE transactions on computer-aided design of integrated circuits and systems, 2000-01, Vol.19 (1), p.30-43

2000

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IEEE_Xplore

Asynchronous Computing in Sense Amplifier-Based Pass Transistor Logic

IEEE transactions on very large scale integration (VLSI) systems, 2009-07, Vol.17 (7), p.883-892

2009

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IEEE_Xplore

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Improving power output for vibration-based energy scavengers

PicoRadio supports ad hoc ultra-low power wireless networking

System-level design: orthogonalization of concerns and platform-based design

A 300- mu W 1.9-GHz CMOS oscillator utilizing micromachined resonators

Low-swing on-chip signaling techniques: effectiveness and robustness

Scheduling of DSP programs onto multiprocessors for maximum throughput

A 0.25 V 460 nW Asynchronous Neural Signal Processor With Inherent Leakage Suppression

Architectural power analysis: The dual bit type method

An Ultra-Low-Power Injection Locked Transmitter for Wireless Sensor Networks

Algorithm selection: a quantitative optimization-intensive approach

Limitations and challenges of computer-aided design technology for CMOS VLSI

Energy aware routing for low energy ad hoc sensor networks

Analysis of multidimensional DSP specifications

A 1V heterogeneous reconfigurable processor IC for baseband wireless applications

Performance optimization using template mapping for datapath-intensive high-level synthesis

A 0.013 }^, 5 \mu\hbox , DC-Coupled Neural Signal Acquisition IC With 0.5 V Supply

Design of Wireless Links to Implanted Brain-Machine Interface Microelectronic Systems

Design methodology for PicoRadio networks

A Fully-Integrated, Miniaturized (0.125 mm²) 10.5 µW Wireless Neural Sensor

Brain-machine interfaces as the new frontier in extreme miniaturization

An integrated CAD system for algorithm-specific IC design

Brain-machine interfaces as the new frontier in extreme miniaturization

A reconfigurable multiprocessor IC for rapid prototyping of algorithmic-specific high-speed DSP data paths

Maximally and arbitrarily fast implementation of linear and feedback linear computations

Asynchronous Computing in Sense Amplifier-Based Pass Transistor Logic

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