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Networks on Chips: from research to products

Design Automation Conference, 2010, p.300-305

2010

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Bringing NoCs to 65 nm

IEEE MICRO, 2007-09, Vol.27 (5), p.75-85

2007

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Timing-Error-Tolerant Network-on-Chip Design Methodology

IEEE transactions on computer-aided design of integrated circuits and systems, 2007-07, Vol.26 (7), p.1297-1310

2007

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Design Issues and Considerations for Low-Cost 3-D TSV IC Technology

IEEE journal of solid-state circuits, 2011-01, Vol.46 (1), p.293-307

2011

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Timing-driven row-based power gating

International Symposium on Low Power Electronics and Design: Proceedings of the 2007 international symposium on Low power electronics and design; 27-29 Aug. 2007, 2007, p.104-109

2007

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Immigration and health: social inequalities in health disparities in the health system, in welfare and work

Giornale italiano di medicina del lavoro ed ergonomia, 2011-04, Vol.33 (2 Suppl), p.7

Pullini, A

2011

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An Energy Efficient System for Touch Modality Classification in Electronic Skin Applications

2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, p.1-4

2019

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On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits

2008 IEEE International Symposium on Circuits and Systems, 2008, p.2761-2764

2008

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Differentiating Small (≤1 cm) Focal Liver Lesions as Metastases or Cysts by means of Computed Tomography : A Case-Study to Illustrate a Fuzzy Logic-Based Method to Assess the Impact of Diagnostic Confidence on Radiological Diagnosis

Computational and mathematical methods in medicine, 2014-01, Vol.2014 (2014), p.1-9

2014

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Design of compact imperfection-immune CNFET layouts for standard-cell-based logic synthesis

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009, p.616-621

2009

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3D NoCs - Unifying inter & intra chip communication

2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, p.3337-3340

2010

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Energy Efficient System for Tactile Data Decoding Using an Ultra-Low Power Parallel Platform

2017 New Generation of CAS (NGCAS), 2017, p.17-20

2017

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Physically clustered forward body biasing for variability compensation in nanometer CMOS design

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009, p.154-159

2009

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A Scalable Algorithmic Framework for Row-Based Power-Gating

2008 Design, Automation and Test in Europe, 2008, p.379-384

2008

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Fault Tolerance Overhead in Network-on-Chip Flow Control Schemes

2005 18th Symposium on Integrated Circuits and Systems Design, 2005, p.224-229

2005

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NoC Design and Implementation in 65nm Technology

First International Symposium on Networks-on-Chip (NOCS'07), 2007, p.273-282

2007

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Fault tolerance overhead in network-on-chip flow control schemes

Proceedings of the 18th annual symposium on Integrated circuits and system design, 2005, p.224-229

2005

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A floorplan-aware interactive tool flow for NoC design and synthesis

2009 IEEE International SOC Conference (SOCC), 2009, p.379-382

2009

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A scalable algorithmic framework for row-based power-gating

Proceedings of the conference on Design, automation and test in Europe, 2008, p.379-384

2008

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Infection and inflammation of the urinary tract: various cases of urinary tract infections investigated with the Thomas' test during forced water loading

La Pediatria medica e chirurgica, 1986-03, Vol.8 (2), p.259

1986

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Herpes zoster in a 12-month-old girl subsequent to intrauterine exposure to the varicella-zoster virus

La Pediatria medica e chirurgica, 1984-07, Vol.6 (4), p.573

1984

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Mr.Wolf: An Energy-Precision Scalable Parallel Ultra Low Power SoC for IoT Edge Processing

IEEE journal of solid-state circuits, 2019-07, Vol.54 (7), p.1970-1981

2019

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Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices

IEEE transactions on very large scale integration (VLSI) systems, 2017-10, Vol.25 (10), p.2700-2713

2017

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Graphene Oxide-Assisted Morphology and Structure of Electrodeposited ZnO Nanostructures

Materials, 2020-01, Vol.13 (2), p.365

2020

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Influence of synthesis conditions on properties of green-reduced graphene oxide

Journal of nanoparticle research : an interdisciplinary forum for nanoscale science and technology, 2013-05, Vol.15 (5), p.1, Article 1605

2013

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Networks on Chips: from research to products

Bringing NoCs to 65 nm

Timing-Error-Tolerant Network-on-Chip Design Methodology

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology

Timing-driven row-based power gating

Immigration and health: social inequalities in health disparities in the health system, in welfare and work

An Energy Efficient System for Touch Modality Classification in Electronic Skin Applications

On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits

Differentiating Small (≤1 cm) Focal Liver Lesions as Metastases or Cysts by means of Computed Tomography : A Case-Study to Illustrate a Fuzzy Logic-Based Method to Assess the Impact of Diagnostic Confidence on Radiological Diagnosis

Design of compact imperfection-immune CNFET layouts for standard-cell-based logic synthesis

3D NoCs - Unifying inter & intra chip communication

Energy Efficient System for Tactile Data Decoding Using an Ultra-Low Power Parallel Platform

Physically clustered forward body biasing for variability compensation in nanometer CMOS design

A Scalable Algorithmic Framework for Row-Based Power-Gating

Fault Tolerance Overhead in Network-on-Chip Flow Control Schemes

NoC Design and Implementation in 65nm Technology

Fault tolerance overhead in network-on-chip flow control schemes

A floorplan-aware interactive tool flow for NoC design and synthesis

A scalable algorithmic framework for row-based power-gating

Infection and inflammation of the urinary tract: various cases of urinary tract infections investigated with the Thomas' test during forced water loading

Herpes zoster in a 12-month-old girl subsequent to intrauterine exposure to the varicella-zoster virus

Mr.Wolf: An Energy-Precision Scalable Parallel Ultra Low Power SoC for IoT Edge Processing

Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices

Graphene Oxide-Assisted Morphology and Structure of Electrodeposited ZnO Nanostructures

Influence of synthesis conditions on properties of green-reduced graphene oxide

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