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Physics-Based Analytical Model for HCS Degradation in STI-LDMOS Transistors
IEEE transactions on electron devices, 2011-09, Vol.58 (9), p.3072-3080
2011
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Characterization and modeling of electrical stress degradation in STI-based integrated power devices
Solid-state electronics, 2014-12, Vol.102, p.25-41
2014
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Mixed Signal and Power Semiconductor Technology for Industrial and Automotive Electronics
2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), 2020, p.10-13
2020
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Current collapse in GaN heterojunction field effect transistors for high-voltage switching applications
2014 IEEE International Reliability Physics Symposium, 2014, p.6C.5.1-6C.5.4
2014
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A Physics-Based Analytical \hbox/f Noise Model for RESURF LDMOS Transistors
IEEE transactions on electron devices, 2013-02, Vol.60 (2), p.677-683
2013
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Smart power technologies enabling power SOC and SIP
2016 IEEE Symposium on VLSI Technology, 2016, p.1-2
2016
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Time-Dependent Dielectric Breakdown in High-Voltage GaN MIS-HEMTs: The Role of Temperature
IEEE transactions on electron devices, 2017-08, Vol.64 (8), p.3132-3138
2017
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Investigation of Trap-Induced Threshold Voltage Instability in GaN-on-Si MISHEMTs
IEEE transactions on electron devices, 2019-02, Vol.66 (2), p.890-895
2019
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Analysis of HCS in STI-based LDMOS transistors
2010 IEEE International Reliability Physics Symposium, 2010, p.881-886
2010
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Time-Dependent Dielectric Breakdown Under AC Stress in GaN MIS-HEMTs
2019 IEEE International Reliability Physics Symposium (IRPS), 2019, p.1-5
2019
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Explanation of the Rugged LDMOS Behavior by Means of Numerical Analysis
IEEE transactions on electron devices, 2009-11, Vol.56 (11), p.2811-2818
2009
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An Insight Into the ESD Behavior of the Nanometer-Scale Drain-Extended NMOS Device-Part I: Turn-On Behavior of the Parasitic Bipolar
IEEE transactions on electron devices, 2011-02, Vol.58 (2), p.309-317
2011
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An Insight Into ESD Behavior of Nanometer-Scale Drain Extended NMOS (DeNMOS) Devices: Part II (Two-Dimensional Study-Biasing & Comparison With NMOS)
IEEE transactions on electron devices, 2011-02, Vol.58 (2), p.318-326
2011
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A new ESD self-protection structure for 700V high side gate drive IC
2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD), 2017, p.467-470
2017
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Temperature Dependence of the Threshold Voltage Shift Induced by Carrier Injection in Integrated STI-Based LDMOS Transistors
IEEE electron device letters, 2011-06, Vol.32 (6), p.791-793
2011
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A RESURF P-N bimodal LDMOS suitable for high voltage power switching applications
2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD), 2015, p.61-64
2015
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A Physics-Based Analytical 1/f Noise Model for RESURF LDMOS Transistors : ADVANCED MODELING OF POWER DEVICES AND THEIR APPLICATIONS
IEEE transactions on electron devices, 2013, Vol.60 (2), p.677-683
2013
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Reverse-recovery safe operating area of diodes in power integrated circuits
2012 24th International Symposium on Power Semiconductor Devices and ICs, 2012, p.65-68
2012
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Mechanisms leading to erratic snapback behavior in bipolar junction transistors with base emitter shorted
Journal of applied physics, 2005-04, Vol.97 (8), p.084504-084504-8
2005
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Modeling the 3D self ballasting behavior and filamentation under high current stressing in DeNMOS
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs, 2011, p.164-167
2011
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Short and long-term safe operating area considerations in LDMOS transistors
2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual, 2005, p.545-550
2005
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Robust high current ESD performance of nano-meter scale DeNMOS by source ballasting
2010 IEEE International Reliability Physics Symposium, 2010, p.853-856
2010
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Zero voltage switching behavior of punchthrough and nonpunchthrough insulated gate bipolar transistors (IGBT's)
IEEE transactions on electron devices, 1998-08, Vol.45 (8), p.1826-1835
1998
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Electrothermal simulations in punchthrough and nonpunchthrough IGBT's
IEEE transactions on electron devices, 1998-10, Vol.45 (10), p.2222-2231
1998
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Improving surface bipolar activity in thin gate oxide DE-NMOS - A critical HV I/O protection element for nano-meter scale technologies
2010 22nd International Symposium on Power Semiconductor Devices & IC's (ISPSD), 2010, p.307-310
2010
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