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Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems: The DESERVE Approach

1, 2017

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Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems

1, 2017

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A Survey on Application Specific Processor Architectures for Digital Hearing Aids

Journal of signal processing systems, 2022-11, Vol.94 (11), p.1293-1308

2022

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A 4μW Low-Power Audio Processor System for Real-Time Jaw Movements Recognition in Grazing Cattle

Journal of signal processing systems, 2023-04, Vol.95 (4), p.407-424

2023

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Evolutionary Algorithms for Instruction Scheduling, Operation Merging, and Register Allocation in VLIW Compilers

Journal of signal processing systems, 2020-07, Vol.92 (7), p.655-678

2020

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Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments

International journal of parallel programming, 2021-08, Vol.49 (4), p.541-569

2021

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NanoController: A Minimal and Flexible Processor Architecture for Ultra-Low-Power Always-On System State Controllers

Embedded Computer Systems: Architectures, Modeling, and Simulation, p.103-119

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DNN-based performance measures for predicting error rates in automatic speech recognition and optimizing hearing aid parameters

Speech communication, 2019-01, Vol.106, p.44-56

2019

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Online stereo camera calibration for automotive vision based on HW-accelerated A-KAZE-feature extraction

Journal of systems architecture, 2019-08, Vol.97, p.335-348

2019

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Dynamic self-reconfiguration of a MIPS-based soft-core processor architecture

Journal of parallel and distributed computing, 2019-11, Vol.133, p.391-406

2019

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Small footprint synthesizable temperature sensor for FPGA devices

Journal of systems architecture, 2017-05, Vol.76, p.28-38

2017

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Analyzing the Performance-Hardware Trade-off of an ASIP-based SIFT Feature Extraction

Journal of signal processing systems, 2016-10, Vol.85 (1), p.83-99

2016

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Guest Editorial: Special Issue on the 2015 International Conference on Embedded Computer Systems—Architectures, Modeling and Simulation (SAMOS XV)

International journal of parallel programming, 2017-12, Vol.45 (6), p.1417-1419

2017

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Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh Environments

Embedded Computer Systems: Architectures, Modeling, and Simulation, p.3-17

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ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving

2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023, p.1-6

2023

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TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs

Applied Reconfigurable Computing. Architectures, Tools, and Applications, p.307-321

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FLINT: layout-oriented FPGA-based methodology for fault tolerant ASIC design

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015, p.297-300

2015

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A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability

Architecture of Computing Systems – ARCS 2015, p.161-172

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A Multi-Shared Register File Structure for VLIW Processors

Journal of signal processing systems, 2010-02, Vol.58 (2), p.215-231

2010

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An Enhanced DMA Controller in SIMD Processors for Video Applications

Architecture of Computing Systems – ARCS 2009, p.159-170

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An area efficient real- and complex-valued multiply-accumulate SIMD unit for digital signal processors

2015 IEEE Workshop on Signal Processing Systems (SiPS), 2015, p.1-6

2015

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Efficient Emulation of Floating-Point Arithmetic on Fixed-Point SIMD Processors

2016 IEEE International Workshop on Signal Processing Systems (SiPS), 2016, p.254-259

2016

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RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration

Embedded Computer Systems: Architectures, Modeling, and Simulation, 2005, p.32-40

2005

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Two-LUT-based synthesizable temperature sensor for Virtex-6 FPGA devices

2017 27th International Conference on Field Programmable Logic and Applications (FPL), 2017, p.1-4

2017

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Customizing a VLIW-SIMD application-specific instruction-set processor for hearing aid devices

2014 IEEE Workshop on Signal Processing Systems (SiPS), 2014, p.1-6

2014

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Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems: The DESERVE Approach

Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems

A Survey on Application Specific Processor Architectures for Digital Hearing Aids

A 4μW Low-Power Audio Processor System for Real-Time Jaw Movements Recognition in Grazing Cattle

Evolutionary Algorithms for Instruction Scheduling, Operation Merging, and Register Allocation in VLIW Compilers

Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments

NanoController: A Minimal and Flexible Processor Architecture for Ultra-Low-Power Always-On System State Controllers

DNN-based performance measures for predicting error rates in automatic speech recognition and optimizing hearing aid parameters

Online stereo camera calibration for automotive vision based on HW-accelerated A-KAZE-feature extraction

Dynamic self-reconfiguration of a MIPS-based soft-core processor architecture

Small footprint synthesizable temperature sensor for FPGA devices

Analyzing the Performance-Hardware Trade-off of an ASIP-based SIFT Feature Extraction

Guest Editorial: Special Issue on the 2015 International Conference on Embedded Computer Systems—Architectures, Modeling and Simulation (SAMOS XV)

Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh Environments

ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving

TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs

FLINT: layout-oriented FPGA-based methodology for fault tolerant ASIC design

A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability

A Multi-Shared Register File Structure for VLIW Processors

An Enhanced DMA Controller in SIMD Processors for Video Applications

An area efficient real- and complex-valued multiply-accumulate SIMD unit for digital signal processors

Efficient Emulation of Floating-Point Arithmetic on Fixed-Point SIMD Processors

RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration

Two-LUT-based synthesizable temperature sensor for Virtex-6 FPGA devices

Customizing a VLIW-SIMD application-specific instruction-set processor for hearing aid devices

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