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Exposure to organophosphate ester flame retardants and plasticizers during pregnancy: Thyroid endocrine disruption and mediation role of oxidative stress

Environment international, 2021-01, Vol.146, p.106215, Article 106215

2021

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A low-power vertical dual-gate neurotransistor with short-term memory for high energy-efficient neuromorphic computing

Nature communications, 2023-10, Vol.14 (1), p.6385-6385, Article 6385

2023

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Silicon Diode Uncooled FPA With Three-Dimensional Integrated CMOS Readout Circuits

IEEE sensors journal, 2019-01, Vol.19 (2), p.426-434

2019

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Using a Negative Binomial Regression Model for Early Warning at the Start of a Hand Foot Mouth Disease Epidemic in Dalian, Liaoning Province, China

PloS one, 2016-06, Vol.11 (6), p.e0157815-e0157815

2016

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Design and Numerical Verification of a Gate-Controlled Lateral Thyristor for Low-Light Level Detection

IEEE journal of the Electron Devices Society, 2021, Vol.9, p.846-853

2021

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Multifocal Mycobacterium kansasii osteomyelitis in a patient on ruxolitinib

Clinical infection in practice, 2022-01, Vol.13, p.100124, Article 100124

2022

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A Fast Application-Based Supply Voltage Optimization Method for Dual Voltage FPGA

IEEE transactions on very large scale integration (VLSI) systems, 2014-12, Vol.22 (12), p.2629-2634

2014

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TID Radiation Response of 3-D Vertical GAA SONOS Memory Cells

IEEE transactions on nuclear science, 2014-04, Vol.61 (2), p.955-960

2014

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Thermal and Electrical Properties of BCB-Liner Through-Silicon Vias

IEEE transactions on components, packaging, and manufacturing technology (2011), 2014-12, Vol.4 (12), p.1936-1946

2014

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Assessment methodology of the lateral migration component in data retention of 3D SONOS memories

Microelectronics and reliability, 2014-09, Vol.54 (9-10), p.1697-1701

2014

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A Combined Modulation of Set Current With Reset Voltage to Achieve 2-bit/cell Performance for Filament-Based RRAM

IEEE journal of the Electron Devices Society, 2014-11, Vol.2 (6), p.154-157

2014

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LSB page refresh based retention error recovery scheme for MLC NAND Flash

Science China. Information sciences, 2016-04, Vol.59 (4), p.117-127, Article 042408

2016

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Total ionizing radiation effects of 2-T SONOS for 130 nm/4 Mb NOR flash memory technology

Science China. Information sciences, 2014-06, Vol.57 (6), p.169-177

2014

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Reliability Comparison of ISSG Oxide and HTO as Tunnel Dielectric in 3-D-SONOS Applications

IEEE electron device letters, 2013-05, Vol.34 (5), p.620-622

2013

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A 1G-cell floating-gate NOR flash memory in 65 nm technology with 100 ns random access time

Science China. Information sciences, 2015-04, Vol.58 (4), p.154-161

2015

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Silicon nanowire pH sensors fabricated with CMOS compatible sidewall mask technology

Sensors and actuators. B, Chemical, 2019-01, Vol.279, p.111-121

2019

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Data pre-emphasis based retention reliability enhance scheme for MLC NAND Flash memories

2015 IEEE 11th International Conference on ASIC (ASICON), 2015, p.1-4

2015

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A cost-efficient self-configurable BIST technique for testing multiplexer-based FPGA interconnect

Journal of electronic testing, 2011-10, Vol.27 (5), p.647-655

2011

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Fabrication of ultra-thin silicon chips using thermally decomposable temporary bonding adhesive

2016 IEEE SENSORS, 2016, p.1-3

2016

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A High-Speed Two-Cell BCH Decoder for Error Correcting in MLC nor Flash Memories

IEEE transactions on circuits and systems. II, Express briefs, 2009-11, Vol.56 (11), p.865-869

2009

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Compact modeling of short-channel effects in back-gated 2D negative capacitance (NC) FETs

Journal of physics. D, Applied physics, 2024-10, Vol.57 (42), p.425105

2024

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A Gate-Controlled Lateral Thyristor Based Pixel with Low-Light Level Extension for High Dynamic Range Applications

IEEE sensors journal, 2022-12, Vol.22 (24), p.1-1

2022

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A comprehensive review of phase 2/3 trials in osteoarthritis: an expert opinion

Expert opinion on emerging drugs, 2024-08, p.1-13

2024

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The Study of Hysteretic Characteristics of FeFETs for Neuromorphic Computing Using a Closed-Form Analytical Model

IEEE transactions on electron devices, 2024-03, Vol.71 (3), p.2184-2191

2024

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Methods to Realize Low-BER and High-Reliability RRAM Chip With Fast Page-Forming Capability

IEEE transactions on electron devices, 2023-02, Vol.70 (2), p.499-505

2023

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Exposure to organophosphate ester flame retardants and plasticizers during pregnancy: Thyroid endocrine disruption and mediation role of oxidative stress

A low-power vertical dual-gate neurotransistor with short-term memory for high energy-efficient neuromorphic computing

Silicon Diode Uncooled FPA With Three-Dimensional Integrated CMOS Readout Circuits

Using a Negative Binomial Regression Model for Early Warning at the Start of a Hand Foot Mouth Disease Epidemic in Dalian, Liaoning Province, China

Design and Numerical Verification of a Gate-Controlled Lateral Thyristor for Low-Light Level Detection

Multifocal Mycobacterium kansasii osteomyelitis in a patient on ruxolitinib

A Fast Application-Based Supply Voltage Optimization Method for Dual Voltage FPGA

TID Radiation Response of 3-D Vertical GAA SONOS Memory Cells

Thermal and Electrical Properties of BCB-Liner Through-Silicon Vias

Assessment methodology of the lateral migration component in data retention of 3D SONOS memories

A Combined Modulation of Set Current With Reset Voltage to Achieve 2-bit/cell Performance for Filament-Based RRAM

LSB page refresh based retention error recovery scheme for MLC NAND Flash

Total ionizing radiation effects of 2-T SONOS for 130 nm/4 Mb NOR flash memory technology

Reliability Comparison of ISSG Oxide and HTO as Tunnel Dielectric in 3-D-SONOS Applications

A 1G-cell floating-gate NOR flash memory in 65 nm technology with 100 ns random access time

Silicon nanowire pH sensors fabricated with CMOS compatible sidewall mask technology

Data pre-emphasis based retention reliability enhance scheme for MLC NAND Flash memories

A cost-efficient self-configurable BIST technique for testing multiplexer-based FPGA interconnect

Fabrication of ultra-thin silicon chips using thermally decomposable temporary bonding adhesive

A High-Speed Two-Cell BCH Decoder for Error Correcting in MLC nor Flash Memories

Compact modeling of short-channel effects in back-gated 2D negative capacitance (NC) FETs

A Gate-Controlled Lateral Thyristor Based Pixel with Low-Light Level Extension for High Dynamic Range Applications

A comprehensive review of phase 2/3 trials in osteoarthritis: an expert opinion

The Study of Hysteretic Characteristics of FeFETs for Neuromorphic Computing Using a Closed-Form Analytical Model

Methods to Realize Low-BER and High-Reliability RRAM Chip With Fast Page-Forming Capability

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