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Public-Key Cryptosystems Based on Composite Degree Residuosity Classes

Advances in Cryptology — EUROCRYPT ’99, 1999, p.223-238

1999

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PRESENT: An Ultra-Lightweight Block Cipher

Cryptographic Hardware and Embedded Systems - CHES 2007, p.450-466

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FPGA Intrinsic PUFs and Their Use for IP Protection

Cryptographic Hardware and Embedded Systems - CHES 2007, p.63-80

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TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks

Cryptographic Hardware and Embedded Systems - CHES 2007, 2007, p.289-302

2007

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Highly Regular Right-to-Left Algorithms for Scalar Multiplication

Cryptographic Hardware and Embedded Systems - CHES 2007, p.135-147

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Searchable encryption revisited : Consistency properties, relation to anonymous IBE, and extensions

Lecture notes in computer science, 2005, p.205-222

2005

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AES Encryption Implementation and Analysis on Commodity Graphics Processing Units

Cryptographic Hardware and Embedded Systems - CHES 2007, p.209-226

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How to Maximize the Potential of FPGA Resources for Modular Exponentiation

Cryptographic Hardware and Embedded Systems - CHES 2007, p.272-288

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Efficient public-key cryptosystems provably secure against active adversaries

Lecture notes in computer science, 1999, p.165-179

1999

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Arithmetic Operators for Pairing-Based Cryptography

Cryptographic Hardware and Embedded Systems - CHES 2007, 2007, p.239-255

2007

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Discrete-Log-Based Signatures May Not Be Equivalent to Discrete Log

Advances in Cryptology - ASIACRYPT 2005, 2005, p.1-20

2005

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On the Power of Bitslice Implementation on Intel Core2 Processor

Cryptographic Hardware and Embedded Systems - CHES 2007, p.121-134

Volltextzugriff (PDF)

High-Speed True Random Number Generation with Logic Gates Only

Cryptographic Hardware and Embedded Systems - CHES 2007, p.45-62

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On Second-Order Differential Power Analysis

Cryptographic Hardware and Embedded Systems – CHES 2005, 2005, p.293-308

2005

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Secret External Encodings Do Not Prevent Transient Fault Analysis

Cryptographic Hardware and Embedded Systems - CHES 2007, p.181-194

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Differential Behavioral Analysis

Cryptographic Hardware and Embedded Systems - CHES 2007, p.413-426

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Masking and Dual-Rail Logic Don’t Add Up

Cryptographic Hardware and Embedded Systems - CHES 2007, p.95-106

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Trapdooring Discrete Logarithms on Elliptic Curves over Rings

Advances in Cryptology — ASIACRYPT 2000, 2000, p.573-584

2000

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Side Channel Cryptanalysis of a Higher Order Masking Scheme

Cryptographic Hardware and Embedded Systems - CHES 2007, p.28-44

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On ideal non-perfect secret sharing schemes

Lecture notes in computer science, 2005, Vol.1361, p.207-216

2005

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Low-Cost Double-Size Modular Exponentiation or How to Stretch Your Cryptoprocessor

Lecture notes in computer science, 1999, Vol.1560, p.223-234

1999

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Accelerating Okamoto-Uchiyama public-key cryptosystem

Electronics letters, 1999-02, Vol.35 (4), p.291-292

1999

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Information Theoretic Evaluation of Side-Channel Resistant Logic Styles

Cryptographic Hardware and Embedded Systems - CHES 2007, p.427-442

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CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method

Cryptographic Hardware and Embedded Systems - CHES 2007, p.364-377

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Smart Card Crypto-Coprocessors for Public-Key Cryptography

Lecture notes in computer science, 2000, p.372-379

2000

Volltextzugriff (PDF)

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Public-Key Cryptosystems Based on Composite Degree Residuosity Classes

PRESENT: An Ultra-Lightweight Block Cipher

FPGA Intrinsic PUFs and Their Use for IP Protection

TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks

Highly Regular Right-to-Left Algorithms for Scalar Multiplication

Searchable encryption revisited : Consistency properties, relation to anonymous IBE, and extensions

AES Encryption Implementation and Analysis on Commodity Graphics Processing Units

How to Maximize the Potential of FPGA Resources for Modular Exponentiation

Efficient public-key cryptosystems provably secure against active adversaries

Arithmetic Operators for Pairing-Based Cryptography

Discrete-Log-Based Signatures May Not Be Equivalent to Discrete Log

On the Power of Bitslice Implementation on Intel Core2 Processor

High-Speed True Random Number Generation with Logic Gates Only

On Second-Order Differential Power Analysis

Secret External Encodings Do Not Prevent Transient Fault Analysis

Differential Behavioral Analysis

Masking and Dual-Rail Logic Don’t Add Up

Trapdooring Discrete Logarithms on Elliptic Curves over Rings

Side Channel Cryptanalysis of a Higher Order Masking Scheme

On ideal non-perfect secret sharing schemes

Low-Cost Double-Size Modular Exponentiation or How to Stretch Your Cryptoprocessor

Accelerating Okamoto-Uchiyama public-key cryptosystem

Information Theoretic Evaluation of Side-Channel Resistant Logic Styles

CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method

Smart Card Crypto-Coprocessors for Public-Key Cryptography

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