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A Model for Predicting On-Current Degradation Caused by Drain-Avalanche Hot Carriers in Low-Temperature Polysilicon Thin-Film Transistors

IEEE transactions on electron devices, 2009-01, Vol.56 (1), p.109-115

2009

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34.5L: Late-News Paper: Low Cost Retarder-less Transflective IPS-LCD

SID International Symposium Digest of technical papers, 2007-05, Vol.38 (1), p.1258-1261

2007

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P-9: Unified Model and Prediction Technique for On-Current Degradation Caused by Drain-Avalanche Hot Carriers in Low-Temperature Poly-Silicon Thin-Film Transistors

SID International Symposium Digest of technical papers, 2007-05, Vol.38 (1), p.202-205

2007

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High Reliability and Performance Poly-Si TFTs for System in Displays

ECS transactions, 2006-10, Vol.3 (8), p.35-41

2006

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Controlling the solid-phase nucleation of amorphous Si by means of a substrate step structure and local phosphorus doping

Japanese Journal of Applied Physics, 1993, Vol.32 (1B), p.312-317

1993

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Degradation Characteristics of n- and p-Channel Polycrystalline-Silicon TFTs Under CMOS Inverter Operation

IEEE transactions on electron devices, 2010-02, Vol.57 (2), p.429-436

2010

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Degradation of n+/p junction characteristics by aluminum contamination

Japanese Journal of Applied Physics, 1997-07, Vol.36 (7A), p.4431-4434

1997

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The increase of the native oxide thickness on H-terminated Si surfaces by gaseous contamination in a clean room atmosphere

Japanese Journal of Applied Physics, 1997-03, Vol.36 (3B), p.1578-1581

1997

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Picosecond time-resolved spectroscopy of the photoluminescence intensity and its dynamical linear polarization of porous Si by 2.86 eV pulse excitation

Japanese Journal of Applied Physics, 1995-12, Vol.34 (12B), p.L1647-L1650

1995

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21.3: An Improved Dynamic Ratio Less Shift Register Circuit Suitable for LTPS-TFT LCD Panels

SID International Symposium Digest of technical papers, 2005-05, Vol.36 (1), p.1050-1053

2005

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12.4: Late-News Paper: Selectively Enlarging Laser Crystallization Technology for High and Uniform Performance Poly-Si TFTs

SID International Symposium Digest of technical papers, 2002-05, Vol.33 (1), p.158-161

2002

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A new model for device degradation in low-temperature N-channel polycrystalline silicon TFTs under AC stress

IEEE transactions on electron devices, 2004-06, Vol.51 (6), p.927-933

2004

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Performance of poly-Si TFTs fabricated by SELAX

IEEE transactions on electron devices, 2004-06, Vol.51 (6), p.934-939

2004

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Effects of the timing of AC stress on device degradation produced by trap states in low-temperature polycrystalline-silicon TFTs

IEEE transactions on electron devices, 2005-08, Vol.52 (8), p.1766-1771

2005

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High On/Off-Current Ratio in Bottom-Gated Microcrystalline-Silicon Thin-Film Transistors With Vertical-Offset Structure

IEEE electron device letters, 2010-09, Vol.31 (9), p.975-977

2010

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Simultaneous Measurement of Size and Depth of Each Defect in a Silicon Wafer Using Light Scattering at Two Wavelengths: Principle, Limitation and Applications of Optical Shallow Defect Analyzer

Japanese Journal of Applied Physics, 1999-06, Vol.38 (6R), p.3776

1999

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12.1: 45°C Low-Temperature Poly-Si TFT Fabrication Process Applicable to the Display Manufacturing Using 730×920mm2 Glass Substrates

SID International Symposium Digest of technical papers, 2002-05, Vol.33 (1), p.146-149

2002

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New Technique to Determine Gettering Efficiency of Heavy Metals and Its Application to Carbon-Ion-Implanted Si Epitaxial Wafers

Japanese Journal of Applied Physics, 2001-04, Vol.40 (4R), p.2105

2001

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A New Study on the Degradation Mechanism in Low-Temperature p-Channel Polycrystalline Silicon TFTs Under Dynamic Stress

IEEE transactions on electron devices, 2006-09, Vol.53 (9), p.2280-2286

2006

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Subthreshold properties of TFTs with laser-crystallized laterally grown polysilicon layers

IEEE electron device letters, 2006-04, Vol.27 (4), p.278-280

2006

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Temperature Dependence of Performance and Hot-Carrier Immunity in Low-Temperature Polycrystalline Silicon Thin-Film Transistors

Japanese Journal of Applied Physics, 2010-08, Vol.49 (8), p.084101-084101-5

2010

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62.1: Invited Paper: Fluorinated Compounds Emission Reduction Activity of WLICC (World LCD Industry Cooperation Committee)

SID International Symposium Digest of technical papers, 2012-06, Vol.43 (1), p.838-841

2012

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Accelerated Negative-Bias Temperature Degradation in Low-Temperature Polycrystalline-Silicon p-Channel TFTs Under Dynamic Stress

IEEE transactions on electron devices, 2007-09, Vol.54 (9), p.2452-2459

2007

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Post-Annealing Effects on a Laterally Grown Polycrystalline Silicon Layer

Japanese Journal of Applied Physics, 2008-08, Vol.47 (8R), p.6217

2008

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Device Performance and Reliability of Fully Developed SOI Transistors and Low-Temperature Poly-Si TFTs

ECS transactions, 2007, Vol.8 (1), p.33-38

2007

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A Model for Predicting On-Current Degradation Caused by Drain-Avalanche Hot Carriers in Low-Temperature Polysilicon Thin-Film Transistors

34.5L: Late-News Paper: Low Cost Retarder-less Transflective IPS-LCD

P-9: Unified Model and Prediction Technique for On-Current Degradation Caused by Drain-Avalanche Hot Carriers in Low-Temperature Poly-Silicon Thin-Film Transistors

High Reliability and Performance Poly-Si TFTs for System in Displays

Controlling the solid-phase nucleation of amorphous Si by means of a substrate step structure and local phosphorus doping

Degradation Characteristics of n- and p-Channel Polycrystalline-Silicon TFTs Under CMOS Inverter Operation

Degradation of n+/p junction characteristics by aluminum contamination

The increase of the native oxide thickness on H-terminated Si surfaces by gaseous contamination in a clean room atmosphere

Picosecond time-resolved spectroscopy of the photoluminescence intensity and its dynamical linear polarization of porous Si by 2.86 eV pulse excitation

21.3: An Improved Dynamic Ratio Less Shift Register Circuit Suitable for LTPS-TFT LCD Panels

12.4: Late-News Paper: Selectively Enlarging Laser Crystallization Technology for High and Uniform Performance Poly-Si TFTs

A new model for device degradation in low-temperature N-channel polycrystalline silicon TFTs under AC stress

Performance of poly-Si TFTs fabricated by SELAX

Effects of the timing of AC stress on device degradation produced by trap states in low-temperature polycrystalline-silicon TFTs

High On/Off-Current Ratio in Bottom-Gated Microcrystalline-Silicon Thin-Film Transistors With Vertical-Offset Structure

Simultaneous Measurement of Size and Depth of Each Defect in a Silicon Wafer Using Light Scattering at Two Wavelengths: Principle, Limitation and Applications of Optical Shallow Defect Analyzer

12.1: 45°C Low-Temperature Poly-Si TFT Fabrication Process Applicable to the Display Manufacturing Using 730×920mm2 Glass Substrates

New Technique to Determine Gettering Efficiency of Heavy Metals and Its Application to Carbon-Ion-Implanted Si Epitaxial Wafers

A New Study on the Degradation Mechanism in Low-Temperature p-Channel Polycrystalline Silicon TFTs Under Dynamic Stress

Subthreshold properties of TFTs with laser-crystallized laterally grown polysilicon layers

Temperature Dependence of Performance and Hot-Carrier Immunity in Low-Temperature Polycrystalline Silicon Thin-Film Transistors

62.1: Invited Paper: Fluorinated Compounds Emission Reduction Activity of WLICC (World LCD Industry Cooperation Committee)

Accelerated Negative-Bias Temperature Degradation in Low-Temperature Polycrystalline-Silicon p-Channel TFTs Under Dynamic Stress

Post-Annealing Effects on a Laterally Grown Polycrystalline Silicon Layer

Device Performance and Reliability of Fully Developed SOI Transistors and Low-Temperature Poly-Si TFTs

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