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Impact of Double-Suction Pump Eye Diameter Variation on Cavitation Phenomena

Machines (Basel), 2024-09, Vol.12 (9), p.633

2024

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WaveVC: Speech and Fundamental Frequency Consistent Raw Audio Voice Conversion

Neural processing letters, 2024-05, Vol.56 (3), p.166, Article 166

2024

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A 31 ns Random Cycle VCAT-Based 4F ^ DRAM With Manufacturability and Enhanced Cell Efficiency

IEEE journal of solid-state circuits, 2010-04, Vol.45 (4), p.880-888

2010

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Analysis of Greenhouse Gas Emissions from Building Remodeling using BIM and LCA : Focused on Building Exterior Materials

KIEAE Journal, 2024-02, Vol.24 (1), p.77-82

2024

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Experimental and numerical investigation on the dent resistance of a dual phase steel originated from the yield-point phenomenon

Journal of materials processing technology, 2021-03, Vol.289, p.116929, Article 116929

2021

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A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme

2012 IEEE International Solid-State Circuits Conference, 2012, p.44-46

2012

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A Robust Deep Learning based Human Tracking Framework in Crowded Environments

Journal of Korea Robotics Society, 2021-12, Vol.16 (4), p.336-344

2021

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A novel method to analyze and design a NWL scheme DRAM

2008 IEEE International Reliability Physics Symposium, 2008, p.701-702

2008

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Twin silicon nanowire FET (TSNWFET) On SOI with 8 nm silicon nanowires and 25 nm surrounding TiN gate

2008 IEEE International SOI Conference, 2008, p.117-118

2008

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Evaluation of Ultra Thin Body Si-On-ONO (UTB SOONO) transistors using ultra thin spacer technology

2008 IEEE International Conference on Integrated Circuit Design and Technology and Tutorial, 2008, p.5-8

2008

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Review of Cases in 2014 ‘Corporate Tax Law’ and ‘International Tax Law’

Seoul Tax Law Review, 2015-08, Vol.21 (2), p.409-439

Kyungseok Oh

2015

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55 nm capacitor-less 1T DRAM cell transistor with non-overlap structure

2008 IEEE International Electron Devices Meeting, 2008, p.1-4

2008

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A 31 ns Random Cycle VCAT-Based 4F 2 DRAM With Manufacturability and Enhanced Cell Efficiency

IEEE journal of solid-state circuits, 2010-04, Vol.45 (4), p.880-888

2010

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Novel stress-memorization-technology (SMT) for high electron mobility enhancement of gate last high-k/metal gate devices

2010 International Electron Devices Meeting, 2010, p.10.1.1-10.1.4

2010

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First demonstration of 3-dimensional stacked FET with top/bottom source-drain isolation and stacked n/p metal gate

2023 International Electron Devices Meeting (IEDM), 2023, p.1-4

2023

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Misalignment Study by Etch Induced Silicon Damage in Single Crystal Etch Process for Shallow Trench Isolation Structure

ECS transactions, 2011, Vol.33 (31), p.53-58

2011

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Random Telegraph Noise in n-type and p-type silicon nanowire transistors

2008 IEEE International Electron Devices Meeting, 2008, p.1-4

2008

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Flicker noise in N-type and P-type silicon nanowire transistors

2008 IEEE Silicon Nanoelectronics Workshop, 2008, p.1-2

2008

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Synthesis and studies of polycarbosilane-based graft copolymers

Oh, Kyungseok

2008

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Cortical activation patterns of electrical pain stimulation using fNIRS

2018 6th International Conference on Brain-Computer Interface (BCI), 2018, p.1-3

2018

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Synthesis and Mesomorphic Properties of Poly(oxyethylene) with [(6-Heptylsulfonyl)hexylthio]methyl Side Groups

Macromolecular rapid communications., 2001-07, Vol.22 (11), p.815-819

2001

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Thin oxide degradation from HDP-CVD oxide deposition in 300mm process

2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866), 2004, p.349-353

2004

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A 31 ns Random Cycle VCAT-Based 4F2 DRAM With Manufacturability and Enhanced Cell Efficiency

IEEE journal of solid-state circuits, 2010, Vol.45 (4), p.880-888

2010

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A 31ns random cycle VCAT-based 4F2 DRAM with enhanced cell efficiency

2009 Symposium on VLSI Circuits, 2009, p.132-133

2009

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Overcoming DRAM scaling limitations by employing straight recessed channel array transistors with uni-axial and [100] uni-plane channels

IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest, 2005, p.319-322

2005

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Impact of Double-Suction Pump Eye Diameter Variation on Cavitation Phenomena

WaveVC: Speech and Fundamental Frequency Consistent Raw Audio Voice Conversion

A 31 ns Random Cycle VCAT-Based 4F ^ DRAM With Manufacturability and Enhanced Cell Efficiency

Analysis of Greenhouse Gas Emissions from Building Remodeling using BIM and LCA : Focused on Building Exterior Materials

Experimental and numerical investigation on the dent resistance of a dual phase steel originated from the yield-point phenomenon

A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme

A Robust Deep Learning based Human Tracking Framework in Crowded Environments

A novel method to analyze and design a NWL scheme DRAM

Twin silicon nanowire FET (TSNWFET) On SOI with 8 nm silicon nanowires and 25 nm surrounding TiN gate

Evaluation of Ultra Thin Body Si-On-ONO (UTB SOONO) transistors using ultra thin spacer technology

Review of Cases in 2014 ‘Corporate Tax Law’ and ‘International Tax Law’

55 nm capacitor-less 1T DRAM cell transistor with non-overlap structure

A 31 ns Random Cycle VCAT-Based 4F 2 DRAM With Manufacturability and Enhanced Cell Efficiency

Novel stress-memorization-technology (SMT) for high electron mobility enhancement of gate last high-k/metal gate devices

First demonstration of 3-dimensional stacked FET with top/bottom source-drain isolation and stacked n/p metal gate

Misalignment Study by Etch Induced Silicon Damage in Single Crystal Etch Process for Shallow Trench Isolation Structure

Random Telegraph Noise in n-type and p-type silicon nanowire transistors

Flicker noise in N-type and P-type silicon nanowire transistors

Synthesis and studies of polycarbosilane-based graft copolymers

Cortical activation patterns of electrical pain stimulation using fNIRS

Synthesis and Mesomorphic Properties of Poly(oxyethylene) with [(6-Heptylsulfonyl)hexylthio]methyl Side Groups

Thin oxide degradation from HDP-CVD oxide deposition in 300mm process

A 31 ns Random Cycle VCAT-Based 4F2 DRAM With Manufacturability and Enhanced Cell Efficiency

A 31ns random cycle VCAT-based 4F2 DRAM with enhanced cell efficiency

Overcoming DRAM scaling limitations by employing straight recessed channel array transistors with uni-axial and [100] uni-plane channels

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