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Modeling of Variation in Submicrometer CMOS ULSI Technologies

IEEE transactions on electron devices, 2006-09, Vol.53 (9), p.2168-2178

2006

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IEEE_Xplore

Turning silicon on its edge [double gate CMOS/FinFET technology]

IEEE circuits and devices magazine, 2004-01, Vol.20 (1), p.20-31

2004

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IEEE_Xplore

Weibull breakdown characteristics and oxide thickness uniformity

IEEE transactions on electron devices, 2000-12, Vol.47 (12), p.2301-2309

2000

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IEEE_Xplore

Tissue Compliance Meter is a More Reproducible Method of Measuring Radiation-induced Fibrosis Than LENT-SOMA in Patients Treated with Intracavitary Brachytherapy Accelerated Partial Breast Irradiation: Results of a Prospective Trial

International journal of radiation oncology, biology, physics, 2010, Vol.78 (3), p.S234-S234

2010

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Scaling planar silicon devices

IEEE circuits and devices magazine, 2004-01, Vol.20 (1), p.6-19

2004

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IEEE_Xplore

Effective Drive Current in Scaled FinFET and NSFET CMOS Inverters

2018 76th Device Research Conference (DRC), 2018, p.1-2

2018

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Can macroscopic oxide thickness uniformity improve oxide reliability?

IEEE electron device letters, 2000-08, Vol.21 (8), p.402-404

2000

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IEEE_Xplore

The effective drive current in CMOS inverters

Digest. International Electron Devices Meeting, 2002, p.121-124

2002

Link zum Volltext
IEEE_Xplore

45 nm SOI and Beyond - Getting to a General Purpose Technology

2007 IEEE International SOI Conference, 2007, p.1-4

2007

Link zum Volltext
IEEE_Xplore

A fundamental performance limit of optimized 3.3-V sub-quarter-micrometer fully overlapped LDD MOSFET's

IEEE transactions on electron devices, 1992-05, Vol.39 (5), p.1208-1215

1992

Link zum Volltext
IEEE_Xplore

RTA-Driven Intra-Die Variations in Stage Delay, and Parametric Sensitivities for 65nm Technology

2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers, 2006, p.170-171

2006

Link zum Volltext
IEEE_Xplore

A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology

20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007, p.665-672

2007

Link zum Volltext
IEEE_Xplore

Compact modeling and simulation of PD-SOI MOSFETs: Current status and challenges

2008 IEEE Custom Integrated Circuits Conference, 2008, p.265-272

2008

Link zum Volltext
IEEE_Xplore

A diagnostic test of the kinetic regime in a packed bed reactor

Chemical engineering science, 1967-01, Vol.22 (3), p.470-470

1967

Link zum Volltext

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A Fin-type independent-double-gate NFET

61st Device Research Conference. Conference Digest (Cat. No.03TH8663), 2003, p.45-46

2003

Link zum Volltext
IEEE_Xplore

Demonstration of FinFET CMOS circuits

60th DRC. Conference Digest Device Research Conference, 2002, p.47-48

2002

Link zum Volltext
IEEE_Xplore

MOSFET technology for low-voltage/low-power applications

IEEE MICRO, 1994-06, Vol.14 (3), p.68-77

1994

Link zum Volltext
IEEE_Xplore

Titanium silicide/silicon nonohmic contact resistance for NFET's, PFET's, diffused resistors, and NPN's in a BiCMOS technology

IEEE transactions on electron devices, 1995-04, Vol.42 (4), p.697-703

1995

Link zum Volltext
IEEE_Xplore

The Temperature Dependence in the Subthreshold Regime of Fully Depleted Double-Gate FinFETs

2005 International Semiconductor Device Research Symposium, 2005, p.11-12

2005

Link zum Volltext
IEEE_Xplore

CMOS devices below 0.1 /spl mu/m: how high will performance go?

International Electron Devices Meeting. IEDM Technical Digest, 1997, p.215-218

1997

Link zum Volltext
IEEE_Xplore

Improved effective switching current (IEFF+) and capacitance methodology for CMOS circuit performance prediction and model-to-hardware correlation

2008 IEEE International Electron Devices Meeting, 2008, p.1-4

2008

Link zum Volltext
IEEE_Xplore

Ultimate CMOS ULSI performance

Proceedings of IEEE International Electron Devices Meeting, 1993, p.115-118

Nowak, E.J.

1993

Link zum Volltext
IEEE_Xplore

Subhalf-micrometer buried-channel PFET design considerations

IEEE transactions on electron devices, 1988-12, Vol.35 (12), p.2430

1988

Link zum Volltext
IEEE_Xplore

Self-Consistent and Efficient Electro-Thermal Analysis for Poly/Metal Gate FinFETs

2006 International Electron Devices Meeting, 2006, p.1-4

2006

Link zum Volltext
IEEE_Xplore

A sub 40-nm body thickness n-type FinFET

Device Research Conference. Conference Digest (Cat. No.01TH8561), 2001, p.24-25

2001

Link zum Volltext
IEEE_Xplore

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Modeling of Variation in Submicrometer CMOS ULSI Technologies

Turning silicon on its edge [double gate CMOS/FinFET technology]

Weibull breakdown characteristics and oxide thickness uniformity

Tissue Compliance Meter is a More Reproducible Method of Measuring Radiation-induced Fibrosis Than LENT-SOMA in Patients Treated with Intracavitary Brachytherapy Accelerated Partial Breast Irradiation: Results of a Prospective Trial

Scaling planar silicon devices

Effective Drive Current in Scaled FinFET and NSFET CMOS Inverters

Can macroscopic oxide thickness uniformity improve oxide reliability?

The effective drive current in CMOS inverters

45 nm SOI and Beyond - Getting to a General Purpose Technology

A fundamental performance limit of optimized 3.3-V sub-quarter-micrometer fully overlapped LDD MOSFET's

RTA-Driven Intra-Die Variations in Stage Delay, and Parametric Sensitivities for 65nm Technology

A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology

Compact modeling and simulation of PD-SOI MOSFETs: Current status and challenges

A diagnostic test of the kinetic regime in a packed bed reactor

A Fin-type independent-double-gate NFET

Demonstration of FinFET CMOS circuits

MOSFET technology for low-voltage/low-power applications

Titanium silicide/silicon nonohmic contact resistance for NFET's, PFET's, diffused resistors, and NPN's in a BiCMOS technology

The Temperature Dependence in the Subthreshold Regime of Fully Depleted Double-Gate FinFETs

CMOS devices below 0.1 /spl mu/m: how high will performance go?

Improved effective switching current (IEFF+) and capacitance methodology for CMOS circuit performance prediction and model-to-hardware correlation

Ultimate CMOS ULSI performance

Subhalf-micrometer buried-channel PFET design considerations

Self-Consistent and Efficient Electro-Thermal Analysis for Poly/Metal Gate FinFETs

A sub 40-nm body thickness n-type FinFET

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