UB Paderborn / Katalog / Suche / in CDI

Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment, 2004-08, Vol.529 (1), p.190-193

2004

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Novel interferometer for cold neutrons using a pair of etalons

Nuclear physics. A, 2003-06, Vol.721, p.C481-C484

2003

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Essential Knowledge for Transistor-Level LSI Circuit Design

1, 2016

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Soluble gp130 regulatess interleukin-6 in cerebrospinal fluid after subarachnoid haemorrhage

Journal of neurology, neurosurgery and psychiatry, 2011-09, Vol.82 (9), p.952-954

2011

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Autonomous di/dt noise control scheme for margin aware operation

Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005, 2005, p.467-470

2005

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7.5Vmax arbitrary waveform generator with 65nm standard CMOS under 1.2V supply voltage

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012, p.1-4

2012

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IEEE_Xplore

Impact of All-Digital PLL on SoC Testing

2012 IEEE 21st Asian Test Symposium, 2012, p.252-257

2012

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IEEE_Xplore

All-digital on-chip monitor for PMOS and NMOS process variability measurement utilizing buffer ring with pulse counter

2010 Proceedings of ESSCIRC, 2010, p.182-185

2010

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IEEE_Xplore

Cold-neutron interferometer of the Jamin type

Physical review. A, Atomic, molecular, and optical physics, 2003-03, Vol.67 (3), Article 033609

2003

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Nuclear-Matter Modification of Decay Widths in the {phi}{yields}e{sup +}e{sup -} and {phi}{yields}K{sup +}K{sup -} Channels

Physical review letters, 2007-04, Vol.98 (15)

2007

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Power integrity control of ATE for emulating power supply fluctuations on customer environment

2012 IEEE International Test Conference, 2012, p.1-10

2012

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Time-to-digital converter based on time difference amplifier with non-linearity calibration

2010 Proceedings of ESSCIRC, 2010, p.266-269

2010

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IEEE_Xplore

On-chip resonant supply noise reduction utilizing switched parasitic capacitors of sleep blocks with tri-mode power gating structure

2011 Proceedings of the ESSCIRC (ESSCIRC), 2011, p.183-186

2011

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IEEE_Xplore

All digital wireless transceiver using modified BPSK and 2/3 sub-sampling technique

2009 IEEE 8th International Conference on ASIC, 2009, p.469-472

2009

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IEEE_Xplore

Feedforward active substrate noise cancelling technique using power supply di/dt detector

Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005, 2005, p.284-287

2005

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IEEE_Xplore

647 MHz, 0.642pJ/block/cycle 65nm self synchronous FPGA

2009 Proceedings of ESSCIRC, 2009, p.156-159

2009

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IEEE_Xplore

Novel Analog in-Memory Compute with > 1 nA Current/Cell and 143.9 TOPS/W Enabled by Monolithic Normally-off Zn-rich CAAC-IGZO FET-on-Si CMOS Technology

2021 IEEE International Electron Devices Meeting (IEDM), 2021, p.21.2.1-21.2.4

2021

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IEEE_Xplore

Preliminary experiments for power supply noise reduction using stubs

Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, 2004, p.286-289

2004

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IEEE_Xplore

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Experimental signature of medium modifications for rho and omega mesons in the 12 GeV p+A reactions

Evidence for in-medium modification of the phi meson at normal nuclear density

Low thermal-budget process of sputtered-PZT capacitor over multilevel metallization

Nuclear-matter modification of decay widths in the phi-->e+e- and phi-->K+K- channels

Evidence for In-Medium Modification of the {phi} Meson at Normal Nuclear Density

Medium modification of vector mesons observed in 12 GeV p+A reactions

Experimental signature of in-medium mass modification of vector mesons at normal nuclear density

Cold-neutron interferometry using beam splitting etalons

Novel interferometer for cold neutrons using a pair of etalons

Essential Knowledge for Transistor-Level LSI Circuit Design

Soluble gp130 regulatess interleukin-6 in cerebrospinal fluid after subarachnoid haemorrhage

Autonomous di/dt noise control scheme for margin aware operation

7.5Vmax arbitrary waveform generator with 65nm standard CMOS under 1.2V supply voltage

Impact of All-Digital PLL on SoC Testing

All-digital on-chip monitor for PMOS and NMOS process variability measurement utilizing buffer ring with pulse counter

Cold-neutron interferometer of the Jamin type

Nuclear-Matter Modification of Decay Widths in the {phi}{yields}e{sup +}e{sup -} and {phi}{yields}K{sup +}K{sup -} Channels

Power integrity control of ATE for emulating power supply fluctuations on customer environment

Time-to-digital converter based on time difference amplifier with non-linearity calibration

On-chip resonant supply noise reduction utilizing switched parasitic capacitors of sleep blocks with tri-mode power gating structure

All digital wireless transceiver using modified BPSK and 2/3 sub-sampling technique

Feedforward active substrate noise cancelling technique using power supply di/dt detector

647 MHz, 0.642pJ/block/cycle 65nm self synchronous FPGA

Novel Analog in-Memory Compute with > 1 nA Current/Cell and 143.9 TOPS/W Enabled by Monolithic Normally-off Zn-rich CAAC-IGZO FET-on-Si CMOS Technology

Preliminary experiments for power supply noise reduction using stubs

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